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-rw-r--r--arch/sh/include/asm/cache.h4
-rw-r--r--arch/sh/include/asm/processor.h6
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/sh/include/asm/cache.h b/arch/sh/include/asm/cache.h
index 0698a377595..abaf4050c39 100644
--- a/arch/sh/include/asm/cache.h
+++ b/arch/sh/include/asm/cache.h
@@ -1,7 +1,7 @@
#ifndef __ASM_SH_CACHE_H
#define __ASM_SH_CACHE_H
-#if defined(CONFIG_SH4)
+#if defined(CONFIG_CPU_SH4)
int cache_control(unsigned int cmd);
@@ -18,7 +18,7 @@ struct __large_struct { unsigned long buf[100]; };
*/
#define ARCH_DMA_MINALIGN 32
-#endif /* CONFIG_SH4 */
+#endif /* CONFIG_CPU_SH4 */
/*
* Use the L1 data cache line size value for the minimum DMA buffer alignment
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index b8677da9593..b07fe542e36 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -1,10 +1,10 @@
#ifndef _ASM_SH_PROCESSOR_H_
#define _ASM_SH_PROCESSOR_H_
-#if defined(CONFIG_SH2)
+#if defined(CONFIG_CPU_SH2)
# include <asm/cpu_sh2.h>
-#elif defined(CONFIG_SH3)
+#elif defined(CONFIG_CPU_SH3)
# include <asm/cpu_sh3.h>
-#elif defined(CONFIG_SH4)
+#elif defined(CONFIG_CPU_SH4)
# include <asm/cpu_sh4.h>
#endif
#endif