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-rw-r--r--arch/x86/cpu/apollolake/Kconfig3
-rw-r--r--arch/x86/dts/chromebook_coral.dts5
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/cpu/apollolake/Kconfig b/arch/x86/cpu/apollolake/Kconfig
index 145b8cbdf5b..8a7481555e2 100644
--- a/arch/x86/cpu/apollolake/Kconfig
+++ b/arch/x86/cpu/apollolake/Kconfig
@@ -41,6 +41,9 @@ config INTEL_APOLLOLAKE
imply SMP
imply HAVE_ITSS
imply HAVE_P2SB
+ imply CLK
+ imply CMD_CLK
+ imply CLK_INTEL
if INTEL_APOLLOLAKE
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts
index a1820fa1870..a4a9e949e68 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -39,6 +39,11 @@
stdout-path = &serial;
};
+ clk: clock {
+ compatible = "intel,apl-clk";
+ #clock-cells = <1>;
+ };
+
cpus {
u-boot,dm-pre-reloc;
#address-cells = <1>;