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-rw-r--r--arch/x86/cpu/pci.c45
-rw-r--r--arch/x86/include/asm/pci.h21
-rw-r--r--arch/x86/lib/fsp/fsp_common.c5
3 files changed, 0 insertions, 71 deletions
diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c
index d2ec45a2403..7a312602a09 100644
--- a/arch/x86/cpu/pci.c
+++ b/arch/x86/cpu/pci.c
@@ -19,51 +19,6 @@
DECLARE_GLOBAL_DATA_PTR;
-static struct pci_controller x86_hose;
-
-int pci_early_init_hose(struct pci_controller **hosep)
-{
- struct pci_controller *hose;
-
- hose = calloc(1, sizeof(struct pci_controller));
- if (!hose)
- return -ENOMEM;
-
- board_pci_setup_hose(hose);
- pci_setup_type1(hose);
- hose->last_busno = pci_hose_scan(hose);
- gd->hose = hose;
- *hosep = hose;
-
- return 0;
-}
-
-__weak int board_pci_pre_scan(struct pci_controller *hose)
-{
- return 0;
-}
-
-__weak int board_pci_post_scan(struct pci_controller *hose)
-{
- return 0;
-}
-
-void pci_init_board(void)
-{
- struct pci_controller *hose = &x86_hose;
-
- /* Stop using the early hose */
- gd->hose = NULL;
-
- board_pci_setup_hose(hose);
- pci_setup_type1(hose);
- pci_register_hose(hose);
-
- board_pci_pre_scan(hose);
- hose->last_busno = pci_hose_scan(hose);
- board_pci_post_scan(hose);
-}
-
static struct pci_controller *get_hose(void)
{
if (gd->hose)
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index f7e968e0b0d..a2945f1aff2 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -25,27 +25,6 @@ struct pci_controller;
void pci_setup_type1(struct pci_controller *hose);
-/**
- * board_pci_setup_hose() - Set up the PCI hose
- *
- * This is called by the common x86 PCI code to set up the PCI controller
- * hose. It may be called when no memory/BSS is available so should just
- * store things in 'hose' and not in BSS variables.
- */
-void board_pci_setup_hose(struct pci_controller *hose);
-
-/**
- * pci_early_init_hose() - Set up PCI host before relocation
- *
- * This allocates memory for, sets up and returns the PCI hose. It can be
- * called before relocation. The hose will be stored in gd->hose for
- * later use, but will become invalid one DRAM is available.
- */
-int pci_early_init_hose(struct pci_controller **hosep);
-
-int board_pci_pre_scan(struct pci_controller *hose);
-int board_pci_post_scan(struct pci_controller *hose);
-
/*
* Simple PCI access routines - these work from either the early PCI hose
* or the 'real' one, created after U-Boot has memory available
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index c78df94b804..5276ce6ab1a 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -35,11 +35,6 @@ int fsp_init_phase_pci(void)
return status ? -EPERM : 0;
}
-int board_pci_post_scan(struct pci_controller *hose)
-{
- return fsp_init_phase_pci();
-}
-
void board_final_cleanup(void)
{
u32 status;