diff options
Diffstat (limited to 'arch/x86')
36 files changed, 182 insertions, 151 deletions
diff --git a/arch/x86/cpu/apollolake/acpi.c b/arch/x86/cpu/apollolake/acpi.c index fd21c0b4968..c610a7f4477 100644 --- a/arch/x86/cpu/apollolake/acpi.c +++ b/arch/x86/cpu/apollolake/acpi.c @@ -146,16 +146,21 @@ void fill_fadt(struct acpi_fadt *fadt) fadt->x_pm_tmr_blk.addrl = IOMAP_ACPI_BASE + PM1_TMR; } -void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, - void *dsdt) +static int apl_write_fadt(struct acpi_ctx *ctx, const struct acpi_writer *entry) { - struct acpi_table_header *header = &fadt->header; + struct acpi_table_header *header; + struct acpi_fadt *fadt; - acpi_fadt_common(fadt, facs, dsdt); + fadt = ctx->current; + acpi_fadt_common(fadt, ctx->facs, ctx->dsdt); intel_acpi_fill_fadt(fadt); fill_fadt(fadt); + header = &fadt->header; header->checksum = table_compute_checksum(fadt, header->length); + + return acpi_add_fadt(ctx, fadt); } +ACPI_WRITER(5fadt, "FADT", apl_write_fadt, 0); int apl_acpi_fill_dmar(struct acpi_ctx *ctx) { diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c index 07757b88a30..4378846f8b0 100644 --- a/arch/x86/cpu/baytrail/acpi.c +++ b/arch/x86/cpu/baytrail/acpi.c @@ -15,20 +15,24 @@ #include <asm/arch/iomap.h> #include <dm/uclass-internal.h> -void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, - void *dsdt) +static int baytrail_write_fadt(struct acpi_ctx *ctx, + const struct acpi_writer *entry) { - struct acpi_table_header *header = &(fadt->header); + struct acpi_table_header *header; + struct acpi_fadt *fadt; + + fadt = ctx->current; + header = &fadt->header; u16 pmbase = ACPI_BASE_ADDRESS; - memset((void *)fadt, 0, sizeof(struct acpi_fadt)); + memset(fadt, '\0', sizeof(struct acpi_fadt)); acpi_fill_header(header, "FACP"); header->length = sizeof(struct acpi_fadt); header->revision = 4; - fadt->firmware_ctrl = (u32)facs; - fadt->dsdt = (u32)dsdt; + fadt->firmware_ctrl = (u32)ctx->facs; + fadt->dsdt = (u32)ctx->dsdt; fadt->preferred_pm_profile = ACPI_PM_MOBILE; fadt->sci_int = 9; fadt->smi_cmd = 0; @@ -75,9 +79,9 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, fadt->reset_reg.addrh = 0; fadt->reset_value = SYS_RST | RST_CPU | FULL_RST; - fadt->x_firmware_ctl_l = (u32)facs; + fadt->x_firmware_ctl_l = (u32)ctx->facs; fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (u32)dsdt; + fadt->x_dsdt_l = (u32)ctx->dsdt; fadt->x_dsdt_h = 0; fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; @@ -137,7 +141,10 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, fadt->x_gpe1_blk.addrh = 0x0; header->checksum = table_compute_checksum(fadt, header->length); + + return acpi_add_fadt(ctx, fadt); } +ACPI_WRITER(5fadt, "FADT", baytrail_write_fadt, 0); int acpi_create_gnvs(struct acpi_global_nvs *gnvs) { diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c index 4a7b4f617f8..c270426d820 100644 --- a/arch/x86/cpu/baytrail/cpu.c +++ b/arch/x86/cpu/baytrail/cpu.c @@ -45,7 +45,7 @@ static void hsuart_clock_set(void *base) * Configure the internal clock of both SIO HS-UARTs, if they are enabled * via FSP */ -static int baytrail_uart_init(void *ctx, struct event *event) +static int baytrail_uart_init(void) { struct udevice *dev; void *base; @@ -64,7 +64,7 @@ static int baytrail_uart_init(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_F, baytrail_uart_init); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, baytrail_uart_init); static void set_max_freq(void) { diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index f30aebfe4c6..cbd4a3b6797 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -11,6 +11,7 @@ #include <event.h> #include <init.h> #include <log.h> +#include <spl.h> #include <asm/cpu.h> #include <asm/cpu_x86.h> #include <asm/cpu_common.h> @@ -25,7 +26,7 @@ #include <asm/arch/pch.h> #include <asm/arch/rcb.h> -static int broadwell_init_cpu(void *ctx, struct event *event) +static int broadwell_init_cpu(void) { struct udevice *dev; int ret; @@ -40,7 +41,7 @@ static int broadwell_init_cpu(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_F, broadwell_init_cpu); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, broadwell_init_cpu); void set_max_freq(void) { @@ -67,12 +68,11 @@ int arch_cpu_init(void) { post_code(POST_CPU_INIT); -#ifdef CONFIG_TPL /* Do a mini-init if TPL has already done the full init */ - return x86_cpu_reinit_f(); -#else - return x86_cpu_init_f(); -#endif + if (IS_ENABLED(CONFIG_TPL) && spl_phase() != PHASE_TPL) + return x86_cpu_reinit_f(); + else + return x86_cpu_init_f(); } int checkcpu(void) diff --git a/arch/x86/cpu/broadwell/sdram.c b/arch/x86/cpu/broadwell/sdram.c index f477d513efc..d30ebee021e 100644 --- a/arch/x86/cpu/broadwell/sdram.c +++ b/arch/x86/cpu/broadwell/sdram.c @@ -5,6 +5,8 @@ * From coreboot src/soc/intel/broadwell/romstage/raminit.c */ +#define LOG_CATEGORY UCLASS_RAM + #include <common.h> #include <dm.h> #include <init.h> diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig index b97c2779041..178f8ad1816 100644 --- a/arch/x86/cpu/coreboot/Kconfig +++ b/arch/x86/cpu/coreboot/Kconfig @@ -25,6 +25,7 @@ config SYS_COREBOOT imply FS_CBFS imply CBMEM_CONSOLE imply X86_TSC_READ_BASE + imply USE_PREBOOT select BINMAN if X86_64 endif diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index d7eedbd7436..82fe4c71cd2 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -7,6 +7,7 @@ #include <common.h> #include <cpu_func.h> +#include <event.h> #include <fdtdec.h> #include <init.h> #include <usb.h> @@ -20,7 +21,14 @@ int arch_cpu_init(void) { - int ret = get_coreboot_info(&lib_sysinfo); + int ret; + + ret = IS_ENABLED(CONFIG_X86_RUN_64BIT) ? x86_cpu_reinit_f() : + x86_cpu_init_f(); + if (ret) + return ret; + + ret = get_coreboot_info(&lib_sysinfo); if (ret != 0) { printf("Failed to parse coreboot tables.\n"); return ret; @@ -28,8 +36,7 @@ int arch_cpu_init(void) timestamp_init(); - return IS_ENABLED(CONFIG_X86_RUN_64BIT) ? x86_cpu_reinit_f() : - x86_cpu_init_f(); + return 0; } int checkcpu(void) @@ -74,13 +81,13 @@ static void board_final_init(void) } } -int last_stage_init(void) +static int last_stage_init(void) { - /* start usb so that usb keyboard can be used as input device */ - if (IS_ENABLED(CONFIG_USB_KEYBOARD)) - usb_init(); + if (IS_ENABLED(CONFIG_SPL_BUILD)) + return 0; board_final_init(); return 0; } +EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init); diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index dddd281e966..ce55efc454b 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -26,6 +26,7 @@ #include <cpu_func.h> #include <dm.h> #include <errno.h> +#include <event.h> #include <init.h> #include <irq.h> #include <log.h> @@ -185,7 +186,8 @@ void show_boot_progress(int val) } #endif -#if !defined(CONFIG_SYS_COREBOOT) && !defined(CONFIG_EFI_STUB) +#if !defined(CONFIG_SYS_COREBOOT) && !defined(CONFIG_EFI_STUB) && \ + !defined(CONFIG_SPL_BUILD) /* * Implement a weak default function for boards that need to do some final init * before the system is ready. @@ -202,7 +204,7 @@ __weak void board_final_cleanup(void) { } -int last_stage_init(void) +static int last_stage_init(void) { struct acpi_fadt __maybe_unused *fadt; int ret; @@ -245,7 +247,9 @@ int last_stage_init(void) return 0; } -#endif +EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init); + +#endif /* !SYS_COREBOOT && !EFI_STUB && !SPL_BUILD */ static int x86_init_cpus(void) { diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c index d8920effd39..708bfbe7ee4 100644 --- a/arch/x86/cpu/efi/payload.c +++ b/arch/x86/cpu/efi/payload.c @@ -9,6 +9,7 @@ #include <efi.h> #include <efi_api.h> #include <errno.h> +#include <event.h> #include <init.h> #include <log.h> #include <usb.h> @@ -168,7 +169,7 @@ int reserve_arch(void) return 0; } -int last_stage_init(void) +static int last_stage_init(void) { /* start usb so that usb keyboard can be used as input device */ if (IS_ENABLED(CONFIG_USB_KEYBOARD)) @@ -176,6 +177,7 @@ int last_stage_init(void) return 0; } +EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init); unsigned int install_e820_map(unsigned int max_entries, struct e820_entry *entries) diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c index 91cd5d7c9e4..8882532ebf3 100644 --- a/arch/x86/cpu/i386/cpu.c +++ b/arch/x86/cpu/i386/cpu.c @@ -415,7 +415,7 @@ int cpu_phys_address_size(void) /* Don't allow PCI region 3 to use memory in the 2-4GB memory hole */ static void setup_pci_ram_top(void) { - gd->pci_ram_top = 0x80000000U; + gd_set_pci_ram_top(0x80000000U); } static void setup_mtrr(void) diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c index 56cc253831a..ff959d1bd8d 100644 --- a/arch/x86/cpu/intel_common/mrc.c +++ b/arch/x86/cpu/intel_common/mrc.c @@ -9,6 +9,7 @@ #include <dm.h> #include <init.h> #include <log.h> +#include <spl.h> #include <syscon.h> #include <asm/cpu.h> #include <asm/global_data.h> @@ -251,13 +252,28 @@ static int sdram_initialise(struct udevice *dev, struct udevice *me_dev, int mrc_common_init(struct udevice *dev, void *pei_data, bool use_asm_linkage) { struct udevice *me_dev; - int ret; + int ret, delay; ret = syscon_get_by_driver_data(X86_SYSCON_ME, &me_dev); if (ret) return ret; + delay = dev_read_u32_default(dev, "fspm,training-delay", 0); + if (spl_phase() == PHASE_SPL) { + if (delay) + printf("SDRAM training (%d seconds)...", delay); + else + log_debug("SDRAM init..."); + } else { + if (delay) + printf("(%d seconds)...", delay); + } + ret = sdram_initialise(dev, me_dev, pei_data, use_asm_linkage); + if (delay) + printf("done\n"); + else + log_debug("done\n"); if (ret) return ret; quick_ram_check(); diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index c988d7ff477..e71a10bfd44 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -54,7 +54,7 @@ int arch_cpu_init(void) return x86_cpu_init_f(); } -static int ivybridge_cpu_init(void *ctx, struct event *ev) +static int ivybridge_cpu_init(void) { struct pci_controller *hose; struct udevice *bus, *dev; @@ -86,7 +86,7 @@ static int ivybridge_cpu_init(void *ctx, struct event *ev) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_F, ivybridge_cpu_init); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, ivybridge_cpu_init); #define PCH_EHCI0_TEMP_BAR0 0xe8000000 #define PCH_EHCI1_TEMP_BAR0 0xe8000400 diff --git a/arch/x86/cpu/quark/acpi.c b/arch/x86/cpu/quark/acpi.c index 82b776ff65f..9a2d682451b 100644 --- a/arch/x86/cpu/quark/acpi.c +++ b/arch/x86/cpu/quark/acpi.c @@ -10,20 +10,24 @@ #include <asm/arch/global_nvs.h> #include <asm/arch/iomap.h> -void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, - void *dsdt) +static int quark_write_fadt(struct acpi_ctx *ctx, + const struct acpi_writer *entry) { - struct acpi_table_header *header = &(fadt->header); u16 pmbase = ACPI_PM1_BASE_ADDRESS; + struct acpi_table_header *header; + struct acpi_fadt *fadt; - memset((void *)fadt, 0, sizeof(struct acpi_fadt)); + fadt = ctx->current; + header = &fadt->header; + + memset(fadt, '\0', sizeof(struct acpi_fadt)); acpi_fill_header(header, "FACP"); header->length = sizeof(struct acpi_fadt); header->revision = 4; - fadt->firmware_ctrl = (u32)facs; - fadt->dsdt = (u32)dsdt; + fadt->firmware_ctrl = (u32)ctx->facs; + fadt->dsdt = (u32)ctx->dsdt; fadt->preferred_pm_profile = ACPI_PM_UNSPECIFIED; fadt->sci_int = 9; fadt->smi_cmd = 0; @@ -70,9 +74,9 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, fadt->reset_reg.addrh = 0; fadt->reset_value = SYS_RST | RST_CPU | FULL_RST; - fadt->x_firmware_ctl_l = (u32)facs; + fadt->x_firmware_ctl_l = (u32)ctx->facs; fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (u32)dsdt; + fadt->x_dsdt_l = (u32)ctx->dsdt; fadt->x_dsdt_h = 0; fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; @@ -132,7 +136,10 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, fadt->x_gpe1_blk.addrh = 0x0; header->checksum = table_compute_checksum(fadt, header->length); + + return acpi_add_fadt(ctx, fadt); } +ACPI_WRITER(5fadt, "FADT", quark_write_fadt, 0); int acpi_create_gnvs(struct acpi_global_nvs *gnvs) { diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index 1be8e38cdf4..62b83c228cf 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -107,7 +107,7 @@ static void quark_setup_bars(void) CONFIG_PCIE_ECAM_BASE | MEM_BAR_EN); } -static void quark_pcie_early_init(void) +static int quark_pcie_early_init(void) { /* * Step1: Assert PCIe signal PERST# @@ -146,6 +146,8 @@ static void quark_pcie_early_init(void) /* Mixer Load Lane 1 */ msg_port_io_clrbits(MSG_PORT_PCIE_AFE, PCIE_RXPICTRL0_L1, (1 << 6) | (1 << 7)); + + return 0; } static void quark_usb_early_init(void) @@ -248,22 +250,16 @@ int arch_cpu_init(void) return 0; } -static int quark_init_pcie(void *ctx, struct event *event) -{ - /* - * Initialize PCIe controller - * - * Quark SoC holds the PCIe controller in reset following a power on. - * U-Boot needs to release the PCIe controller from reset. The PCIe - * controller (D23:F0/F1) will not be visible in PCI configuration - * space and any access to its PCI configuration registers will cause - * system hang while it is held in reset. - */ - quark_pcie_early_init(); - - return 0; -} -EVENT_SPY(EVT_DM_POST_INIT_F, quark_init_pcie); +/* + * Initialize PCIe controller + * + * Quark SoC holds the PCIe controller in reset following a power on. + * U-Boot needs to release the PCIe controller from reset. The PCIe + * controller (D23:F0/F1) will not be visible in PCI configuration + * space and any access to its PCI configuration registers will cause + * system hang while it is held in reset. + */ +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, quark_pcie_early_init); int checkcpu(void) { diff --git a/arch/x86/cpu/tangier/acpi.c b/arch/x86/cpu/tangier/acpi.c index 3ffba3897aa..1c667c7d569 100644 --- a/arch/x86/cpu/tangier/acpi.c +++ b/arch/x86/cpu/tangier/acpi.c @@ -16,19 +16,23 @@ #include <asm/arch/iomap.h> #include <dm/uclass-internal.h> -void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, - void *dsdt) +static int tangier_write_fadt(struct acpi_ctx *ctx, + const struct acpi_writer *entry) { - struct acpi_table_header *header = &(fadt->header); + struct acpi_table_header *header; + struct acpi_fadt *fadt; - memset((void *)fadt, 0, sizeof(struct acpi_fadt)); + fadt = ctx->current; + header = &fadt->header; + + memset(fadt, '\0', sizeof(struct acpi_fadt)); acpi_fill_header(header, "FACP"); header->length = sizeof(struct acpi_fadt); header->revision = 6; - fadt->firmware_ctrl = (u32)facs; - fadt->dsdt = (u32)dsdt; + fadt->firmware_ctrl = (u32)ctx->facs; + fadt->dsdt = (u32)ctx->dsdt; fadt->preferred_pm_profile = ACPI_PM_UNSPECIFIED; fadt->iapc_boot_arch = ACPI_FADT_VGA_NOT_PRESENT | @@ -41,13 +45,16 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, fadt->minor_revision = 2; - fadt->x_firmware_ctl_l = (u32)facs; + fadt->x_firmware_ctl_l = (u32)ctx->facs; fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (u32)dsdt; + fadt->x_dsdt_l = (u32)ctx->dsdt; fadt->x_dsdt_h = 0; header->checksum = table_compute_checksum(fadt, header->length); + + return acpi_add_fadt(ctx, fadt); } +ACPI_WRITER(5fadt, "FADT", tangier_write_fadt, 0); u32 acpi_fill_madt(u32 current) { diff --git a/arch/x86/cpu/tangier/pinmux.c b/arch/x86/cpu/tangier/pinmux.c index 7b2c35fbf79..23bfa7c18d2 100644 --- a/arch/x86/cpu/tangier/pinmux.c +++ b/arch/x86/cpu/tangier/pinmux.c @@ -13,6 +13,7 @@ #include <asm/cpu.h> #include <asm/scu.h> #include <linux/io.h> +#include <linux/printk.h> #define BUFCFG_OFFSET 0x100 diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c index ee74a1f0433..374b262b134 100644 --- a/arch/x86/cpu/tangier/sdram.c +++ b/arch/x86/cpu/tangier/sdram.c @@ -9,6 +9,7 @@ #include <asm/e820.h> #include <asm/global_data.h> #include <asm/sfi.h> +#include <linux/printk.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c index d1c3873dd6a..2647bff891f 100644 --- a/arch/x86/cpu/x86_64/cpu.c +++ b/arch/x86/cpu/x86_64/cpu.c @@ -8,8 +8,11 @@ #include <cpu_func.h> #include <debug_uart.h> #include <init.h> +#include <asm/cpu.h> #include <asm/global_data.h> +DECLARE_GLOBAL_DATA_PTR; + int cpu_has_64bit(void) { return true; @@ -38,6 +41,10 @@ int x86_mp_init(void) int x86_cpu_reinit_f(void) { + /* set the vendor to Intel so that native_calibrate_tsc() works */ + gd->arch.x86_vendor = X86_VENDOR_INTEL; + gd->arch.has_mtrr = true; + return 0; } diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts index 96705ceed07..ddff277046a 100644 --- a/arch/x86/dts/chromebook_samus.dts +++ b/arch/x86/dts/chromebook_samus.dts @@ -266,6 +266,7 @@ board-id-gpios = <&gpio_c 5 0>, <&gpio_c 4 0>, <&gpio_c 3 0>, <&gpio_c 1 0>; bootph-all; + fspm,training-delay = <7>; spd { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts index f9ff5346a79..0eb31cae42c 100644 --- a/arch/x86/dts/coreboot.dts +++ b/arch/x86/dts/coreboot.dts @@ -42,6 +42,7 @@ }; coreboot-fb { + bootph-some-ram; compatible = "coreboot-fb"; }; }; diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h index 72e1873d15d..226753b65d6 100644 --- a/arch/x86/include/asm/acpi_table.h +++ b/arch/x86/include/asm/acpi_table.h @@ -24,8 +24,6 @@ struct acpi_table_header; /* These can be used by the target port */ -void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, - void *dsdt); int acpi_create_madt_lapics(u32 current); int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id, u32 addr, u32 gsi_base); diff --git a/arch/x86/include/asm/coreboot_tables.h b/arch/x86/include/asm/coreboot_tables.h index 4de137fbab9..0dfb64babb9 100644 --- a/arch/x86/include/asm/coreboot_tables.h +++ b/arch/x86/include/asm/coreboot_tables.h @@ -299,11 +299,24 @@ struct cb_vdat { #define CB_TAG_TIMESTAMPS 0x0016 #define CB_TAG_CBMEM_CONSOLE 0x0017 +#define CBMC_CURSOR_MASK ((1 << 28) - 1) +#define CBMC_OVERFLOW BIT(31) + +/* + * struct cbmem_console - In-memory console buffer for coreboot + * + * Structure describing console buffer. It is overlaid on a flat memory area, + * with body covering the extent of the memory. Once the buffer is full, + * output will wrap back around to the start of the buffer. The high bit of the + * cursor field gets set to indicate that this happened. If the underlying + * storage allows this, the buffer will persist across multiple boots and append + * to the previous log. + */ struct cbmem_console { u32 size; u32 cursor; - char body[0]; -} __packed; + u8 body[0]; +}; #define CB_TAG_MRC_CACHE 0x0018 diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index ea58259ad77..6f4a7130f1d 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -127,6 +127,7 @@ struct arch_global_data { ulong table_end; /* End address of x86 tables */ ulong table_start_high; /* Start address of high x86 tables */ ulong table_end_high; /* End address of high x86 tables */ + ulong smbios_start; /* Start address of SMBIOS table */ }; #endif diff --git a/arch/x86/include/asm/sections.h b/arch/x86/include/asm/sections.h index a6be3604e9b..874a43d16c7 100644 --- a/arch/x86/include/asm/sections.h +++ b/arch/x86/include/asm/sections.h @@ -8,4 +8,6 @@ #include <asm-generic/sections.h> +extern char __data_end[]; + #endif diff --git a/arch/x86/include/asm/zimage.h b/arch/x86/include/asm/zimage.h index 9ad74dc0b94..655675b6661 100644 --- a/arch/x86/include/asm/zimage.h +++ b/arch/x86/include/asm/zimage.h @@ -62,41 +62,4 @@ struct boot_params *load_zimage(char *image, unsigned long kernel_size, int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, ulong initrd_addr, ulong initrd_size, ulong cmdline_force); -/** - * zimage_dump() - Dump the metadata of a zimage - * - * This shows all available information in a zimage that has been loaded. - * - * @base_ptr: Pointer to the boot parameters, typically at address - * DEFAULT_SETUP_BASE - */ -void zimage_dump(struct boot_params *base_ptr); - -/** - * zboot_start() - Boot a zimage - * - * Boot a zimage, given the component parts - * - * @addr: Address where the bzImage is moved before booting, either - * BZIMAGE_LOAD_ADDR or ZIMAGE_LOAD_ADDR - * @base: Pointer to the boot parameters, typically at address - * DEFAULT_SETUP_BASE - * @initrd: Address of the initial ramdisk, or 0 if none - * @initrd_size: Size of the initial ramdisk, or 0 if none - * @cmdline: Command line to use for booting - * Return: -EFAULT on error (normally it does not return) - */ -int zboot_start(ulong addr, ulong size, ulong initrd, ulong initrd_size, - ulong base, char *cmdline); - -/* - * zimage_get_kernel_version() - Get the version string from a kernel - * - * @params: boot_params pointer - * @kernel_base: base address of kernel - * Return: Kernel version as a NUL-terminated string - */ -const char *zimage_get_kernel_version(struct boot_params *params, - void *kernel_base); - #endif diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index e3b7e9a4bbe..c5b33dc65de 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -458,21 +458,6 @@ int acpi_write_gnvs(struct acpi_ctx *ctx, const struct acpi_writer *entry) } ACPI_WRITER(4gnvs, "GNVS", acpi_write_gnvs, 0); -static int acpi_write_fadt(struct acpi_ctx *ctx, - const struct acpi_writer *entry) -{ - struct acpi_fadt *fadt; - - fadt = ctx->current; - acpi_create_fadt(fadt, ctx->facs, ctx->dsdt); - acpi_add_table(ctx, fadt); - - acpi_inc(ctx, sizeof(struct acpi_fadt)); - - return 0; -} -ACPI_WRITER(5fact, "FADT", acpi_write_fadt, 0); - /** * acpi_write_hpet() - Write out a HPET table * diff --git a/arch/x86/lib/coreboot/cb_sysinfo.c b/arch/x86/lib/coreboot/cb_sysinfo.c index dfbc80c430e..f7fd9ea5bcb 100644 --- a/arch/x86/lib/coreboot/cb_sysinfo.c +++ b/arch/x86/lib/coreboot/cb_sysinfo.c @@ -471,6 +471,7 @@ int get_coreboot_info(struct sysinfo_t *info) return -ENOENT; gd->arch.coreboot_table = addr; gd_set_acpi_start(map_to_sysmem(info->rsdp)); + gd_set_smbios_start(info->smbios_start); gd->flags |= GD_FLG_SKIP_LL_INIT; return 0; diff --git a/arch/x86/lib/fsp1/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c index 20926171822..df18f476756 100644 --- a/arch/x86/lib/fsp1/fsp_common.c +++ b/arch/x86/lib/fsp1/fsp_common.c @@ -101,3 +101,4 @@ int arch_fsp_init(void) return 0; } +EVENT_SPY_SIMPLE(EVT_FSP_INIT_F, arch_fsp_init); diff --git a/arch/x86/lib/fsp2/fsp_common.c b/arch/x86/lib/fsp2/fsp_common.c index 20c3f6406ad..d802a86967d 100644 --- a/arch/x86/lib/fsp2/fsp_common.c +++ b/arch/x86/lib/fsp2/fsp_common.c @@ -8,11 +8,6 @@ #include <init.h> #include <asm/fsp/fsp_support.h> -int arch_fsp_init(void) -{ - return 0; -} - void board_final_cleanup(void) { u32 status; diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c index afec7d08d67..aadc08cf3c4 100644 --- a/arch/x86/lib/fsp2/fsp_init.c +++ b/arch/x86/lib/fsp2/fsp_init.c @@ -19,7 +19,7 @@ #include <dm/uclass-internal.h> #include <asm/fsp2/fsp_internal.h> -int fsp_setup_pinctrl(void *ctx, struct event *event) +int fsp_setup_pinctrl(void) { struct udevice *dev; ofnode node; @@ -42,7 +42,7 @@ int fsp_setup_pinctrl(void *ctx, struct event *event) return ret; } -EVENT_SPY(EVT_DM_POST_INIT_F, fsp_setup_pinctrl); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, fsp_setup_pinctrl); #if !defined(CONFIG_TPL_BUILD) binman_sym_declare(ulong, intel_fsp_m, image_pos); diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index 60a2707dcf1..bf0c921577d 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -15,7 +15,8 @@ DECLARE_GLOBAL_DATA_PTR; int init_cache_f_r(void) { bool do_mtrr = CONFIG_IS_ENABLED(X86_32BIT_INIT) || - IS_ENABLED(CONFIG_FSP_VERSION2); + IS_ENABLED(CONFIG_FSP_VERSION2) || + (IS_ENABLED(CONFIG_TPL) && IS_ENABLED(CONFIG_HAVE_MRC)); int ret; /* @@ -23,11 +24,9 @@ int init_cache_f_r(void) * * booting from slimbootloader - MTRRs are already set up * booting with FSPv1 - MTRRs are already set up - * booting with FSPv2 - MTRRs must be set here + * booting with FSPv2 or MRC - MTRRs must be set here * booting from coreboot - in this case there is no SPL, so we set up * the MTRRs here - * Note: if there is an SPL, then it has already set up MTRRs so we - * don't need to do that here */ do_mtrr &= !IS_ENABLED(CONFIG_FSP_VERSION1) && !IS_ENABLED(CONFIG_SYS_SLIMBOOTLOADER); diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c index 5b1b420a643..da819b9bdd2 100644 --- a/arch/x86/lib/relocate.c +++ b/arch/x86/lib/relocate.c @@ -26,11 +26,11 @@ DECLARE_GLOBAL_DATA_PTR; int copy_uboot_to_ram(void) { - size_t len = (uintptr_t)&__data_end - (uintptr_t)&__text_start; + size_t len = (uintptr_t)__data_end - (uintptr_t)__text_start; if (gd->flags & GD_FLG_SKIP_RELOC) return 0; - memcpy((void *)gd->relocaddr, (void *)&__text_start, len); + memcpy((void *)gd->relocaddr, (void *)__text_start, len); return 0; } @@ -38,8 +38,8 @@ int copy_uboot_to_ram(void) #ifndef CONFIG_EFI_APP int clear_bss(void) { - ulong dst_addr = (ulong)&__bss_start + gd->reloc_off; - size_t len = (uintptr_t)&__bss_end - (uintptr_t)&__bss_start; + ulong dst_addr = (ulong)__bss_start + gd->reloc_off; + size_t len = (uintptr_t)__bss_end - (uintptr_t)__bss_start; if (gd->flags & GD_FLG_SKIP_RELOC) return 0; @@ -150,12 +150,12 @@ static void do_elf_reloc_fixups32(unsigned int text_base, uintptr_t size, */ int do_elf_reloc_fixups(void) { - void *re_src = (void *)(&__rel_dyn_start); - void *re_end = (void *)(&__rel_dyn_end); + void *re_src = (void *)__rel_dyn_start; + void *re_end = (void *)__rel_dyn_end; uint text_base; /* The size of the region of u-boot that runs out of RAM. */ - uintptr_t size = (uintptr_t)&__bss_end - (uintptr_t)&__text_start; + uintptr_t size = (uintptr_t)__bss_end - (uintptr_t)__text_start; if (gd->flags & GD_FLG_SKIP_RELOC) return 0; diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index f99df08fbec..c15f11f8cdf 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -138,9 +138,9 @@ static int x86_spl_init(void) } #ifndef CONFIG_SYS_COREBOOT - debug("BSS clear from %lx to %lx len %lx\n", (ulong)&__bss_start, - (ulong)&__bss_end, (ulong)&__bss_end - (ulong)&__bss_start); - memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start); + debug("BSS clear from %lx to %lx len %lx\n", (ulong)__bss_start, + (ulong)__bss_end, (ulong)__bss_end - (ulong)__bss_start); + memset(__bss_start, 0, (ulong)__bss_end - (ulong)__bss_start); # ifndef CONFIG_TPL /* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */ @@ -230,6 +230,9 @@ void board_init_f_r(void) mtrr_commit(false); init_cache(); gd->flags &= ~GD_FLG_SERIAL_READY; + + /* make sure driver model is not accessed from now on */ + gd->flags |= GD_FLG_DM_DEAD; debug("cache status %d\n", dcache_status()); board_init_r(gd, 0); } @@ -258,7 +261,7 @@ static int spl_board_load_image(struct spl_image_info *spl_image, spl_image->os = IH_OS_U_BOOT; spl_image->name = "U-Boot"; - if (!IS_ENABLED(CONFIG_SYS_COREBOOT)) { + if (spl_image->load_addr != spl_get_image_pos()) { /* Copy U-Boot from ROM */ memcpy((void *)spl_image->load_addr, (void *)spl_get_image_pos(), spl_get_image_size()); diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c index 67bc0a72aeb..5b5070f7ca5 100644 --- a/arch/x86/lib/tables.c +++ b/arch/x86/lib/tables.c @@ -97,6 +97,9 @@ int write_tables(void) int size = table->size ? : CONFIG_ROM_TABLE_SIZE; u32 rom_table_end; + if (!strcmp("smbios", table->name)) + gd->arch.smbios_start = rom_addr; + if (IS_ENABLED(CONFIG_BLOBLIST_TABLES) && table->tag) { if (!gd->arch.table_end) gd->arch.table_end = rom_addr; diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index 18b05b2f672..273e9c8e1ca 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -3,6 +3,8 @@ * Copyright (c) 2018 Google, Inc */ +#define LOG_CATEGORY LOGC_BOOT + #include <common.h> #include <debug_uart.h> #include <dm.h> diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index 062e3d3e315..a41e1ccf8a6 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -692,7 +692,7 @@ static void show_loader(struct setup_header *hdr) printf("\n"); } -void zimage_dump(struct boot_params *base_ptr) +void zimage_dump(struct boot_params *base_ptr, bool show_cmdline) { struct setup_header *hdr; const char *version; @@ -703,7 +703,7 @@ void zimage_dump(struct boot_params *base_ptr) printf("E820: %d entries\n", base_ptr->e820_entries); if (base_ptr->e820_entries) { - printf("%18s %16s %s\n", "Addr", "Size", "Type"); + printf("%12s %10s %s\n", "Addr", "Size", "Type"); for (i = 0; i < base_ptr->e820_entries; i++) { struct e820_entry *entry = &base_ptr->e820_map[i]; @@ -749,7 +749,7 @@ void zimage_dump(struct boot_params *base_ptr) print_num("Ext loader ver", hdr->ext_loader_ver); print_num("Ext loader type", hdr->ext_loader_type); print_num("Command line ptr", hdr->cmd_line_ptr); - if (hdr->cmd_line_ptr) { + if (show_cmdline && hdr->cmd_line_ptr) { printf(" "); /* Use puts() to avoid limits from CONFIG_SYS_PBSIZE */ puts((char *)(ulong)hdr->cmd_line_ptr); @@ -787,7 +787,7 @@ static int do_zboot_dump(struct cmd_tbl *cmdtp, int flag, int argc, printf("No zboot setup_base\n"); return CMD_RET_FAILURE; } - zimage_dump(base_ptr); + zimage_dump(base_ptr, true); return 0; } |