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-rw-r--r--arch/x86/Kconfig9
-rw-r--r--arch/x86/cpu/Makefile2
-rw-r--r--arch/x86/cpu/i386/interrupt.c2
3 files changed, 12 insertions, 1 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index a1c18d26e1d..8fc9187165c 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -736,6 +736,15 @@ config I8259_PIC
slave) interrupt controllers. Include this to have U-Boot set up
the interrupt correctly.
+config APIC
+ bool
+ default y
+ help
+ The (A)dvanced (P)rogrammable (I)nterrupt (C)ontroller is responsible
+ for catching interrupts and distributing them to one or more CPU
+ cores. In most cases there are some LAPICs (local) for each core and
+ one I/O APIC. This conjunction is found on most modern x86 systems.
+
config PINCTRL_ICH6
bool
help
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index f862d8c071e..54668aab240 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -35,7 +35,7 @@ obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
obj-$(CONFIG_INTEL_QUARK) += quark/
obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
obj-$(CONFIG_INTEL_TANGIER) += tangier/
-obj-y += lapic.o ioapic.o
+obj-$(CONFIG_APIC) += lapic.o ioapic.o
obj-y += irq.o
ifndef CONFIG_$(SPL_)X86_64
obj-$(CONFIG_SMP) += mp_init.o
diff --git a/arch/x86/cpu/i386/interrupt.c b/arch/x86/cpu/i386/interrupt.c
index ed8423e0799..1ea415b876d 100644
--- a/arch/x86/cpu/i386/interrupt.c
+++ b/arch/x86/cpu/i386/interrupt.c
@@ -264,7 +264,9 @@ int interrupt_init(void)
i8259_init();
#endif
+#ifdef CONFIG_APIC
lapic_setup();
+#endif
/* Initialize core interrupt and exception functionality of CPU */
cpu_init_interrupts();