diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/dragonboard845c-uboot.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/dts/sdm845.dtsi | 16 | ||||
| -rw-r--r-- | arch/arm/dts/starqltechn-uboot.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm/dts/starqltechn.dts | 16 | ||||
| -rw-r--r-- | arch/arm/mach-snapdragon/include/mach/gpio.h | 28 |
5 files changed, 37 insertions, 30 deletions
diff --git a/arch/arm/dts/dragonboard845c-uboot.dtsi b/arch/arm/dts/dragonboard845c-uboot.dtsi index 7106db8a734..7728f4f4a3e 100644 --- a/arch/arm/dts/dragonboard845c-uboot.dtsi +++ b/arch/arm/dts/dragonboard845c-uboot.dtsi @@ -19,7 +19,7 @@ bootph-all; }; - pinctrl_north@3900000 { + pinctrl@3400000 { bootph-all; }; }; diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi index 3b86b9328fc..4798ace0ff8 100644 --- a/arch/arm/dts/sdm845.dtsi +++ b/arch/arm/dts/sdm845.dtsi @@ -26,23 +26,13 @@ #power-domain-cells = <1>; }; - gpio_north: gpio_north@3900000 { - #gpio-cells = <2>; - compatible = "qcom,sdm845-pinctrl"; - reg = <0x3900000 0x400000>; - gpio-count = <150>; - gpio-controller; - gpio-ranges = <&gpio_north 0 0 150>; - gpio-bank-name = "soc_north."; - }; - - tlmm_north: pinctrl_north@3900000 { + tlmm: pinctrl@3400000 { compatible = "qcom,sdm845-pinctrl"; - reg = <0x3900000 0x400000>; + reg = <0x3400000 0xc00000>; gpio-count = <150>; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&tlmm_north 0 0 150>; + gpio-ranges = <&tlmm 0 0 150>; /* DEBUG UART */ qup_uart9: qup-uart9-default { diff --git a/arch/arm/dts/starqltechn-uboot.dtsi b/arch/arm/dts/starqltechn-uboot.dtsi index d81a22ffe49..034d5c1c07e 100644 --- a/arch/arm/dts/starqltechn-uboot.dtsi +++ b/arch/arm/dts/starqltechn-uboot.dtsi @@ -19,10 +19,7 @@ clock-controller@100000 { bootph-all; }; - gpio_north@3900000 { - bootph-all; - }; - pinctrl_north@3900000 { + pinctrl@3400000 { bootph-all; }; }; diff --git a/arch/arm/dts/starqltechn.dts b/arch/arm/dts/starqltechn.dts index eec51d165f9..5b6372bee79 100644 --- a/arch/arm/dts/starqltechn.dts +++ b/arch/arm/dts/starqltechn.dts @@ -65,15 +65,15 @@ serial@a84000 { status = "okay"; }; + }; +}; - pinctrl_north@3900000 { - muic_i2c: muic_i2c { - pins = "GPIO_33", "GPIO_34"; - drive-strength = <0x2>; - function = "gpio"; - bias-disable; - }; - }; +&tlmm { + muic_i2c: muic-i2c-n { + pins = "GPIO_33", "GPIO_34"; + drive-strength = <0x2>; + function = "gpio"; + bias-disable; }; }; diff --git a/arch/arm/mach-snapdragon/include/mach/gpio.h b/arch/arm/mach-snapdragon/include/mach/gpio.h index bbc2bc16175..8dac62f870b 100644 --- a/arch/arm/mach-snapdragon/include/mach/gpio.h +++ b/arch/arm/mach-snapdragon/include/mach/gpio.h @@ -1,8 +1,28 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Empty gpio.h + * Qualcomm common pin control data. * - * This file must stay as arch/arm/include/asm/gpio.h requires it. - * - * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com> + * Copyright (C) 2023 Linaro Ltd. */ +#ifndef _QCOM_GPIO_H_ +#define _QCOM_GPIO_H_ + +#include <asm/types.h> +#include <stdbool.h> + +struct msm_pin_data { + int pin_count; + const unsigned int *pin_offsets; +}; + +static inline u32 qcom_pin_offset(const unsigned int *offs, unsigned int selector) +{ + u32 out = (selector * 0x1000); + + if (offs) + return out + offs[selector]; + + return out; +} + +#endif /* _QCOM_GPIO_H_ */ |