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-rw-r--r--arch/powerpc/cpu/mpc85xx/Kconfig5
-rw-r--r--arch/powerpc/cpu/mpc85xx/Makefile4
-rw-r--r--arch/powerpc/cpu/mpc85xx/cmd_errata.c4
-rw-r--r--arch/powerpc/include/asm/config_mpc85xx.h2
-rw-r--r--arch/powerpc/include/asm/fsl_secure_boot.h2
-rw-r--r--arch/powerpc/include/asm/immap_85xx.h2
6 files changed, 12 insertions, 7 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 51192fe9dc3..0ddb7c5d925 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -170,6 +170,7 @@ config TARGET_P1_TWR
config TARGET_P2041RDB
bool "Support P2041RDB"
+ select ARCH_P2041
select PHYS_64BIT
config TARGET_QEMU_PPCE500
@@ -221,6 +222,7 @@ config TARGET_CONTROLCENTERD
config TARGET_KMP204X
bool "Support kmp204x"
+ select ARCH_P2041
select PHYS_64BIT
config TARGET_XPEDITE520X
@@ -311,6 +313,9 @@ config ARCH_P1025
config ARCH_P2020
bool
+config ARCH_P2041
+ bool
+
source "board/freescale/b4860qds/Kconfig"
source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig"
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index 14461e9d6ac..de35824439f 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -39,7 +39,7 @@ obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_SYS_DPAA_QBMAN) += portals.o
# various SoC specific assignments
-obj-$(CONFIG_PPC_P2041) += p2041_ids.o
+obj-$(CONFIG_ARCH_P2041) += p2041_ids.o
obj-$(CONFIG_PPC_P3041) += p3041_ids.o
obj-$(CONFIG_PPC_P4080) += p4080_ids.o
obj-$(CONFIG_PPC_P5020) += p5020_ids.o
@@ -81,7 +81,7 @@ obj-$(CONFIG_ARCH_P1023) += p1023_serdes.o
obj-$(CONFIG_ARCH_P1024) += p1021_serdes.o
obj-$(CONFIG_ARCH_P1025) += p1021_serdes.o
obj-$(CONFIG_ARCH_P2020) += p2020_serdes.o
-obj-$(CONFIG_PPC_P2041) += p2041_serdes.o
+obj-$(CONFIG_ARCH_P2041) += p2041_serdes.o
obj-$(CONFIG_PPC_P3041) += p3041_serdes.o
obj-$(CONFIG_PPC_P4080) += p4080_serdes.o
obj-$(CONFIG_PPC_P5020) += p5020_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 3b06ae42e4b..1aba6a8ca95 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -26,7 +26,7 @@ static void check_erratum_a4849(uint32_t svr)
void __iomem *dcsr = (void *)CONFIG_SYS_DCSRBAR + 0xb0000;
unsigned int i;
-#if defined(CONFIG_PPC_P2041) || defined(CONFIG_PPC_P3041)
+#if defined(CONFIG_ARCH_P2041) || defined(CONFIG_PPC_P3041)
static const uint8_t offsets[] = {
0x50, 0x54, 0x58, 0x90, 0x94, 0x98
};
@@ -45,7 +45,7 @@ static void check_erratum_a4849(uint32_t svr)
}
}
-#if defined(CONFIG_PPC_P2041) || defined(CONFIG_PPC_P3041)
+#if defined(CONFIG_ARCH_P2041) || defined(CONFIG_PPC_P3041)
x108 = 0x12;
#endif
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index dc8a6968f0a..cd47883e58e 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -300,7 +300,7 @@
#define CONFIG_SYS_FSL_ERRATUM_A004477
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#elif defined(CONFIG_PPC_P2041) /* also supports P2040 */
+#elif defined(CONFIG_ARCH_P2041) /* also supports P2040 */
#define CONFIG_SYS_FSL_QORIQ_CHASSIS1
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_MAX_CPUS 4
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h
index e65487cf165..a928aa207ce 100644
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -62,7 +62,7 @@
defined(CONFIG_PPC_P4080) || \
defined(CONFIG_PPC_P5020) || \
defined(CONFIG_PPC_P5040) || \
- defined(CONFIG_PPC_P2041)
+ defined(CONFIG_ARCH_P2041)
#define CONFIG_FSL_TRUST_ARCH_v1
#endif
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index ba0faa80ea3..0388d4bc684 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1856,7 +1856,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
#define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC2 0x00080000
#define FSL_CORENET_RCWSR11_EC2_USB2 0x00100000
#endif
-#if defined(CONFIG_PPC_P2041) \
+#if defined(CONFIG_ARCH_P2041) \
|| defined(CONFIG_PPC_P3041) || defined(CONFIG_PPC_P5020)
#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_RGMII 0x00000000
#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_MII 0x00800000