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-rw-r--r--arch/arm/mach-aspeed/ast2500/sdram_ast2500.c2
-rw-r--r--arch/arm/mach-rockchip/rk3288/sdram_rk3288.c2
-rw-r--r--arch/nios2/cpu/cpu.c2
-rw-r--r--arch/x86/cpu/broadwell/cpu.c10
-rw-r--r--arch/x86/cpu/broadwell/pch.c4
-rw-r--r--arch/x86/cpu/broadwell/pinctrl_broadwell.c4
-rw-r--r--arch/x86/cpu/broadwell/sata.c2
-rw-r--r--arch/x86/cpu/cpu_x86.c2
-rw-r--r--arch/x86/cpu/intel_common/lpc.c2
-rw-r--r--arch/x86/cpu/intel_common/mrc.c2
-rw-r--r--arch/x86/cpu/irq.c2
-rw-r--r--arch/x86/cpu/ivybridge/lpc.c6
-rw-r--r--arch/x86/cpu/ivybridge/model_206ax.c4
-rw-r--r--arch/x86/cpu/ivybridge/sata.c4
-rw-r--r--arch/x86/cpu/mp_init.c3
-rw-r--r--arch/x86/lib/mpspec.c3
-rw-r--r--arch/x86/lib/pinctrl_ich6.c2
17 files changed, 29 insertions, 27 deletions
diff --git a/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c b/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c
index ace10281166..cb6e03fa342 100644
--- a/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c
+++ b/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c
@@ -392,7 +392,7 @@ static int ast2500_sdrammc_ofdata_to_platdata(struct udevice *dev)
priv->regs = regmap_get_range(map, 0);
priv->phy = regmap_get_range(map, 1);
- priv->clock_rate = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+ priv->clock_rate = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"clock-frequency", 0);
if (!priv->clock_rate) {
diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
index be3d7132020..89fd8e6bff1 100644
--- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
@@ -1016,7 +1016,7 @@ static int rk3288_dmc_ofdata_to_platdata(struct udevice *dev)
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3288_sdram_params *params = dev_get_platdata(dev);
const void *blob = gd->fdt_blob;
- int node = dev->of_offset;
+ int node = dev_of_offset(dev);
int ret;
/* Rk3288 supports dual-channel, set default channel num to 2 */
diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c
index 4f0f8fc5f8b..c1caa651742 100644
--- a/arch/nios2/cpu/cpu.c
+++ b/arch/nios2/cpu/cpu.c
@@ -103,7 +103,7 @@ static int altera_nios2_get_count(struct udevice *dev)
static int altera_nios2_probe(struct udevice *dev)
{
const void *blob = gd->fdt_blob;
- int node = dev->of_offset;
+ int node = dev_of_offset(dev);
gd->cpu_clk = fdtdec_get_int(blob, node,
"clock-frequency", 0);
diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c
index 6977e860321..1b71d566c95 100644
--- a/arch/x86/cpu/broadwell/cpu.c
+++ b/arch/x86/cpu/broadwell/cpu.c
@@ -256,8 +256,8 @@ static void initialize_vr_config(struct udevice *dev)
/* Set the slow ramp rate */
msr.hi &= ~(0x3 << (53 - 32));
/* Configure the C-state exit ramp rate */
- ramp = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "intel,slow-ramp",
- -1);
+ ramp = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
+ "intel,slow-ramp", -1);
if (ramp != -1) {
/* Configured slow ramp rate */
msr.hi |= ((ramp & 0x3) << (53 - 32));
@@ -271,8 +271,8 @@ static void initialize_vr_config(struct udevice *dev)
}
/* Set MIN_VID (31:24) to allow CPU to have full control */
msr.lo &= ~0xff000000;
- min_vid = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "intel,min-vid",
- 0);
+ min_vid = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
+ "intel,min-vid", 0);
msr.lo |= (min_vid & 0xff) << 24;
msr_write(MSR_VR_MISC_CONFIG, msr);
@@ -562,7 +562,7 @@ static void configure_thermal_target(struct udevice *dev)
int tcc_offset;
msr_t msr;
- tcc_offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+ tcc_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"intel,tcc-offset", 0);
/* Set TCC activaiton offset if supported */
diff --git a/arch/x86/cpu/broadwell/pch.c b/arch/x86/cpu/broadwell/pch.c
index 317f57d3f98..16eac3daae6 100644
--- a/arch/x86/cpu/broadwell/pch.c
+++ b/arch/x86/cpu/broadwell/pch.c
@@ -190,14 +190,14 @@ static int pch_power_options(struct udevice *dev)
debug("Set power %s after power failure.\n", state);
/* GPE setup based on device tree configuration */
- ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
+ ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
"intel,gpe0-en", enable, ARRAY_SIZE(enable));
if (ret)
return -EINVAL;
enable_all_gpe(enable[0], enable[1], enable[2], enable[3]);
/* SMI setup based on device tree configuration */
- enable_alt_smi(dev, fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+ enable_alt_smi(dev, fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"intel,alt-gp-smi-enable", 0));
return 0;
diff --git a/arch/x86/cpu/broadwell/pinctrl_broadwell.c b/arch/x86/cpu/broadwell/pinctrl_broadwell.c
index 2a3fcedd0db..881413f4769 100644
--- a/arch/x86/cpu/broadwell/pinctrl_broadwell.c
+++ b/arch/x86/cpu/broadwell/pinctrl_broadwell.c
@@ -51,7 +51,7 @@ static int broadwell_pinctrl_read_configs(struct udevice *dev,
int node;
debug("%s: starting\n", __func__);
- for (node = fdt_first_subnode(blob, dev->of_offset);
+ for (node = fdt_first_subnode(blob, dev_of_offset(dev));
node > 0;
node = fdt_next_subnode(blob, node)) {
int phandle = fdt_get_phandle(blob, node);
@@ -115,7 +115,7 @@ static int broadwell_pinctrl_read_pins(struct udevice *dev,
int count = 0;
int node;
- for (node = fdt_first_subnode(blob, dev->of_offset);
+ for (node = fdt_first_subnode(blob, dev_of_offset(dev));
node > 0;
node = fdt_next_subnode(blob, node)) {
int len, i;
diff --git a/arch/x86/cpu/broadwell/sata.c b/arch/x86/cpu/broadwell/sata.c
index 2e4708262c1..10461d99a8c 100644
--- a/arch/x86/cpu/broadwell/sata.c
+++ b/arch/x86/cpu/broadwell/sata.c
@@ -235,7 +235,7 @@ static int broadwell_sata_ofdata_to_platdata(struct udevice *dev)
{
struct sata_platdata *plat = dev_get_platdata(dev);
const void *blob = gd->fdt_blob;
- int node = dev->of_offset;
+ int node = dev_of_offset(dev);
plat->port_map = fdtdec_get_int(blob, node, "intel,sata-port-map", 0);
plat->port0_gen3_tx = fdtdec_get_int(blob, node,
diff --git a/arch/x86/cpu/cpu_x86.c b/arch/x86/cpu/cpu_x86.c
index 157f3de6d81..8be14b59291 100644
--- a/arch/x86/cpu/cpu_x86.c
+++ b/arch/x86/cpu/cpu_x86.c
@@ -17,7 +17,7 @@ int cpu_x86_bind(struct udevice *dev)
struct cpu_platdata *plat = dev_get_parent_platdata(dev);
struct cpuid_result res;
- plat->cpu_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+ plat->cpu_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"intel,apic-id", -1);
plat->family = gd->arch.x86;
res = cpuid(1);
diff --git a/arch/x86/cpu/intel_common/lpc.c b/arch/x86/cpu/intel_common/lpc.c
index 03cb45b6369..696b6304fe1 100644
--- a/arch/x86/cpu/intel_common/lpc.c
+++ b/arch/x86/cpu/intel_common/lpc.c
@@ -50,7 +50,7 @@ int lpc_common_early_init(struct udevice *dev)
int count;
int i;
- count = fdtdec_get_int_array_count(gd->fdt_blob, dev->of_offset,
+ count = fdtdec_get_int_array_count(gd->fdt_blob, dev_of_offset(dev),
"intel,gen-dec", (u32 *)values,
sizeof(values) / sizeof(u32));
if (count < 0)
diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c
index 01b6e866b5b..f1a249af72c 100644
--- a/arch/x86/cpu/intel_common/mrc.c
+++ b/arch/x86/cpu/intel_common/mrc.c
@@ -149,7 +149,7 @@ int mrc_locate_spd(struct udevice *dev, int size, const void **spd_datap)
spd_index = dm_gpio_get_values_as_int(desc, ret);
debug("spd index %d\n", spd_index);
- node = fdt_first_subnode(blob, dev->of_offset);
+ node = fdt_first_subnode(blob, dev_of_offset(dev));
if (node < 0)
return -EINVAL;
for (spd_node = fdt_first_subnode(blob, node);
diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c
index d2901de6d58..f5654eb510d 100644
--- a/arch/x86/cpu/irq.c
+++ b/arch/x86/cpu/irq.c
@@ -96,7 +96,7 @@ static int create_pirq_routing_table(struct udevice *dev)
int i;
int ret;
- node = dev->of_offset;
+ node = dev_of_offset(dev);
/* extract the bdf from fdt_pci_addr */
priv->bdf = dm_pci_get_bdf(dev->parent);
diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c
index aef1206be41..4e254b3c571 100644
--- a/arch/x86/cpu/ivybridge/lpc.c
+++ b/arch/x86/cpu/ivybridge/lpc.c
@@ -86,7 +86,7 @@ static int pch_pirq_init(struct udevice *pch)
{
uint8_t route[8], *ptr;
- if (fdtdec_get_byte_array(gd->fdt_blob, pch->of_offset,
+ if (fdtdec_get_byte_array(gd->fdt_blob, dev_of_offset(pch),
"intel,pirq-routing", route, sizeof(route)))
return -EINVAL;
ptr = route;
@@ -113,7 +113,7 @@ static int pch_gpi_routing(struct udevice *pch)
u32 reg;
int gpi;
- if (fdtdec_get_byte_array(gd->fdt_blob, pch->of_offset,
+ if (fdtdec_get_byte_array(gd->fdt_blob, dev_of_offset(pch),
"intel,gpi-routing", route, sizeof(route)))
return -EINVAL;
@@ -128,7 +128,7 @@ static int pch_gpi_routing(struct udevice *pch)
static int pch_power_options(struct udevice *pch)
{
const void *blob = gd->fdt_blob;
- int node = pch->of_offset;
+ int node = dev_of_offset(pch);
u8 reg8;
u16 reg16, pmbase;
u32 reg32;
diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c
index d5f32196ae3..81dedee2ec0 100644
--- a/arch/x86/cpu/ivybridge/model_206ax.c
+++ b/arch/x86/cpu/ivybridge/model_206ax.c
@@ -288,8 +288,8 @@ static int configure_thermal_target(struct udevice *dev)
int tcc_offset;
msr_t msr;
- tcc_offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "tcc-offset",
- 0);
+ tcc_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
+ "tcc-offset", 0);
/* Set TCC activaiton offset if supported */
msr = msr_read(MSR_PLATFORM_INFO);
diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c
index c7ffbc11fd9..0f5e1904257 100644
--- a/arch/x86/cpu/ivybridge/sata.c
+++ b/arch/x86/cpu/ivybridge/sata.c
@@ -39,7 +39,7 @@ static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch)
{
unsigned int port_map, speed_support, port_tx;
const void *blob = gd->fdt_blob;
- int node = dev->of_offset;
+ int node = dev_of_offset(dev);
const char *mode;
u32 reg32;
u16 reg16;
@@ -190,7 +190,7 @@ static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch)
static void bd82x6x_sata_enable(struct udevice *dev)
{
const void *blob = gd->fdt_blob;
- int node = dev->of_offset;
+ int node = dev_of_offset(dev);
unsigned port_map;
const char *mode;
u16 map = 0;
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 2b6b3bd04e6..988073cc795 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -568,7 +568,8 @@ int mp_init_cpu(struct udevice *cpu, void *unused)
* seq num in the uclass_resolve_seq() during device_probe(). To avoid
* this, set req_seq to the reg number in the device tree in advance.
*/
- cpu->req_seq = fdtdec_get_int(gd->fdt_blob, cpu->of_offset, "reg", -1);
+ cpu->req_seq = fdtdec_get_int(gd->fdt_blob, dev_of_offset(cpu), "reg",
+ -1);
plat->ucode_version = microcode_read_rev();
plat->device_id = gd->arch.x86_device;
diff --git a/arch/x86/lib/mpspec.c b/arch/x86/lib/mpspec.c
index 17e977ce5e3..a6e493d69af 100644
--- a/arch/x86/lib/mpspec.c
+++ b/arch/x86/lib/mpspec.c
@@ -304,7 +304,8 @@ static int mptable_add_intsrc(struct mp_config_table *mc,
}
/* Get I/O interrupt information from device tree */
- cell = fdt_getprop(blob, dev->of_offset, "intel,pirq-routing", &len);
+ cell = fdt_getprop(blob, dev_of_offset(dev), "intel,pirq-routing",
+ &len);
if (!cell)
return -ENOENT;
diff --git a/arch/x86/lib/pinctrl_ich6.c b/arch/x86/lib/pinctrl_ich6.c
index fb2d2940c95..406852d324d 100644
--- a/arch/x86/lib/pinctrl_ich6.c
+++ b/arch/x86/lib/pinctrl_ich6.c
@@ -187,7 +187,7 @@ static int ich6_pinctrl_probe(struct udevice *dev)
return -EINVAL;
}
- for (pin_node = fdt_first_subnode(gd->fdt_blob, dev->of_offset);
+ for (pin_node = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
pin_node > 0;
pin_node = fdt_next_subnode(gd->fdt_blob, pin_node)) {
/* Configure the pin */
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-14 18:56:59 +0000