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-rw-r--r--arch/mips/lib/cache.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index bf8ff598acd..7482005b679 100644
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -95,6 +95,10 @@ void flush_dcache_range(ulong start_addr, ulong stop)
const void *addr = (const void *)(start_addr & ~(lsize - 1));
const void *aend = (const void *)((stop - 1) & ~(lsize - 1));
+ /* aend will be miscalculated when size is zero, so we return here */
+ if (start_addr == stop)
+ return;
+
while (1) {
mips_cache(HIT_WRITEBACK_INV_D, addr);
if (addr == aend)
@@ -109,6 +113,10 @@ void invalidate_dcache_range(ulong start_addr, ulong stop)
const void *addr = (const void *)(start_addr & ~(lsize - 1));
const void *aend = (const void *)((stop - 1) & ~(lsize - 1));
+ /* aend will be miscalculated when size is zero, so we return here */
+ if (start_addr == stop)
+ return;
+
while (1) {
mips_cache(HIT_INVALIDATE_D, addr);
if (addr == aend)