diff options
Diffstat (limited to 'board/freescale/t102xrdb/eth_t102xrdb.c')
| -rw-r--r-- | board/freescale/t102xrdb/eth_t102xrdb.c | 27 |
1 files changed, 24 insertions, 3 deletions
diff --git a/board/freescale/t102xrdb/eth_t102xrdb.c b/board/freescale/t102xrdb/eth_t102xrdb.c index f611ff07e98..dd386bc3a99 100644 --- a/board/freescale/t102xrdb/eth_t102xrdb.c +++ b/board/freescale/t102xrdb/eth_t102xrdb.c @@ -1,6 +1,8 @@ /* * Copyright 2014 Freescale Semiconductor, Inc. * + * Shengzhou Liu <Shengzhou.Liu@freescale.com> + * * SPDX-License-Identifier: GPL-2.0+ */ @@ -56,6 +58,7 @@ int board_eth_init(bd_t *bis) fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY1_ADDR); switch (srds_s1) { +#ifdef CONFIG_T1024RDB case 0x95: /* set the on-board RGMII2 PHY */ fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY2_ADDR); @@ -63,10 +66,17 @@ int board_eth_init(bd_t *bis) /* set 10G XFI with Aquantia AQR105 PHY */ fm_info_set_phy_address(FM1_10GEC1, FM1_10GEC1_PHY_ADDR); break; +#endif + case 0x6a: + case 0x6b: case 0x77: case 0x135: /* set the on-board 2.5G SGMII AQR105 PHY */ - fm_info_set_phy_address(FM1_DTSEC3, SGMII_PHY1_ADDR); + fm_info_set_phy_address(FM1_DTSEC3, SGMII_AQR_PHY_ADDR); +#ifdef CONFIG_T1023RDB + /* set the on-board 1G SGMII RTL8211F PHY */ + fm_info_set_phy_address(FM1_DTSEC1, SGMII_RTK_PHY_ADDR); +#endif break; default: printf("SerDes protocol 0x%x is not supported on T102xRDB\n", @@ -81,6 +91,14 @@ int board_eth_init(bd_t *bis) dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); fm_info_set_mdio(i, dev); break; + case PHY_INTERFACE_MODE_SGMII: +#if defined(CONFIG_T1023RDB) + dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); +#elif defined(CONFIG_T1024RDB) + dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME); +#endif + fm_info_set_mdio(i, dev); + break; case PHY_INTERFACE_MODE_SGMII_2500: dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME); fm_info_set_mdio(i, dev); @@ -110,13 +128,16 @@ int board_eth_init(bd_t *bis) void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, enum fm_port port, int offset) { - if ((fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII_2500) && - (port == FM1_DTSEC3)) { +#if defined(CONFIG_T1024RDB) + if (((fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII_2500) || + (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII)) && + (port == FM1_DTSEC3)) { fdt_set_phy_handle(fdt, compat, addr, "sg_2500_aqr105_phy4"); fdt_setprop(fdt, offset, "phy-connection-type", "sgmii-2500", 10); fdt_status_disabled_by_alias(fdt, "xg_aqr105_phy3"); } +#endif } void fdt_fixup_board_enet(void *fdt) |