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-rw-r--r--board/freescale/imx8mm_evk/spl.c3
-rw-r--r--board/freescale/imx8mn_evk/spl.c3
-rw-r--r--board/freescale/imx8mp_evk/spl.c3
-rw-r--r--board/freescale/imx93_evk/spl.c3
4 files changed, 0 insertions, 12 deletions
diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c
index b5a2faf3a18..6e9513805cd 100644
--- a/board/freescale/imx8mm_evk/spl.c
+++ b/board/freescale/imx8mm_evk/spl.c
@@ -99,9 +99,6 @@ static int power_init_board(void)
/* set VDD_SNVS_0V8 from default 0.85V */
pmic_reg_write(dev, PCA9450_LDO2CTRL, 0xC0);
- /* set WDOG_B_CFG to cold reset */
- pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
-
return 0;
}
diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c
index 380abecd746..ec0378b5b76 100644
--- a/board/freescale/imx8mn_evk/spl.c
+++ b/board/freescale/imx8mn_evk/spl.c
@@ -95,9 +95,6 @@ int power_init_board(void)
/* enable LDO4 to 1.2v */
pmic_reg_write(dev, PCA9450_LDO4CTRL, 0x44);
- /* set WDOG_B_CFG to cold reset */
- pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
-
return 0;
}
#endif
diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c
index f1b285417d0..246826a0d48 100644
--- a/board/freescale/imx8mp_evk/spl.c
+++ b/board/freescale/imx8mp_evk/spl.c
@@ -102,9 +102,6 @@ int power_init_board(void)
/* To avoid timing risk from SOC to ARM,increase VDD_ARM to OD voltage 0.95v */
pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
- /* set WDOG_B_CFG to cold reset */
- pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
-
return 0;
}
#endif
diff --git a/board/freescale/imx93_evk/spl.c b/board/freescale/imx93_evk/spl.c
index 38cfbac6ea6..1aa2977b409 100644
--- a/board/freescale/imx93_evk/spl.c
+++ b/board/freescale/imx93_evk/spl.c
@@ -74,9 +74,6 @@ int power_init_board(void)
/* I2C_LT_EN*/
pmic_reg_write(dev, 0xa, 0x3);
-
- /* set WDOG_B_CFG to cold reset */
- pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
return 0;
}
#endif