aboutsummaryrefslogtreecommitdiff
path: root/board/xilinx
diff options
context:
space:
mode:
Diffstat (limited to 'board/xilinx')
-rw-r--r--board/xilinx/dts/zynq-microzed.dts14
-rw-r--r--board/xilinx/dts/zynq-zc702.dts14
-rw-r--r--board/xilinx/dts/zynq-zc706.dts14
-rw-r--r--board/xilinx/dts/zynq-zc770-xm010.dts14
-rw-r--r--board/xilinx/dts/zynq-zc770-xm012.dts14
-rw-r--r--board/xilinx/dts/zynq-zc770-xm013.dts14
-rw-r--r--board/xilinx/dts/zynq-zed.dts14
-rw-r--r--board/xilinx/zynq/board.c25
8 files changed, 123 insertions, 0 deletions
diff --git a/board/xilinx/dts/zynq-microzed.dts b/board/xilinx/dts/zynq-microzed.dts
new file mode 100644
index 00000000000..6da71c116d0
--- /dev/null
+++ b/board/xilinx/dts/zynq-microzed.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx MicroZED board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+
+/ {
+ model = "Zynq MicroZED Board";
+ compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000";
+};
diff --git a/board/xilinx/dts/zynq-zc702.dts b/board/xilinx/dts/zynq-zc702.dts
new file mode 100644
index 00000000000..667dc282563
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc702.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC702 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+
+/ {
+ model = "Zynq ZC702 Board";
+ compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
+};
diff --git a/board/xilinx/dts/zynq-zc706.dts b/board/xilinx/dts/zynq-zc706.dts
new file mode 100644
index 00000000000..526fc8888ba
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc706.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC706 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+
+/ {
+ model = "Zynq ZC706 Board";
+ compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
+};
diff --git a/board/xilinx/dts/zynq-zc770-xm010.dts b/board/xilinx/dts/zynq-zc770-xm010.dts
new file mode 100644
index 00000000000..8b542a109be
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc770-xm010.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC770 XM010 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+
+/ {
+ model = "Zynq ZC770 XM010 Board";
+ compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000";
+};
diff --git a/board/xilinx/dts/zynq-zc770-xm012.dts b/board/xilinx/dts/zynq-zc770-xm012.dts
new file mode 100644
index 00000000000..0379a070681
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc770-xm012.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC770 XM012 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+
+/ {
+ model = "Zynq ZC770 XM012 Board";
+ compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000";
+};
diff --git a/board/xilinx/dts/zynq-zc770-xm013.dts b/board/xilinx/dts/zynq-zc770-xm013.dts
new file mode 100644
index 00000000000..a4f9e05fc0e
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc770-xm013.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC770 XM013 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+
+/ {
+ model = "Zynq ZC770 XM013 Board";
+ compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
+};
diff --git a/board/xilinx/dts/zynq-zed.dts b/board/xilinx/dts/zynq-zed.dts
new file mode 100644
index 00000000000..91a5deba4a9
--- /dev/null
+++ b/board/xilinx/dts/zynq-zed.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZED board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+
+/ {
+ model = "Zynq ZED Board";
+ compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";
+};
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 5119c09037e..a5b9bdef46a 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -12,6 +12,12 @@
DECLARE_GLOBAL_DATA_PTR;
+/* Bootmode setting values */
+#define ZYNQ_BM_MASK 0x0F
+#define ZYNQ_BM_NOR 0x02
+#define ZYNQ_BM_SD 0x05
+#define ZYNQ_BM_JTAG 0x0
+
#ifdef CONFIG_FPGA
Xilinx_desc fpga;
@@ -59,6 +65,25 @@ int board_init(void)
return 0;
}
+int board_late_init(void)
+{
+ switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
+ case ZYNQ_BM_NOR:
+ setenv("modeboot", "norboot");
+ break;
+ case ZYNQ_BM_SD:
+ setenv("modeboot", "sdboot");
+ break;
+ case ZYNQ_BM_JTAG:
+ setenv("modeboot", "jtagboot");
+ break;
+ default:
+ setenv("modeboot", "");
+ break;
+ }
+
+ return 0;
+}
#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)