diff options
Diffstat (limited to 'board')
25 files changed, 1145 insertions, 666 deletions
diff --git a/board/davinci/common/Makefile b/board/davinci/common/Makefile new file mode 100644 index 00000000000..127bb6ede9f --- /dev/null +++ b/board/davinci/common/Makefile @@ -0,0 +1,53 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)board/$(VENDOR)/common) +endif + +LIB = $(obj)lib$(VENDOR).a + +COBJS := psc.o misc.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### +# This is for $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c new file mode 100644 index 00000000000..71a3b87acf5 --- /dev/null +++ b/board/davinci/common/misc.c @@ -0,0 +1,126 @@ +/* + * Miscelaneous DaVinci functions. + * + * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> + * Copyright (C) 2008 Lyrtech <www.lyrtech.com> + * Copyright (C) 2004 Texas Instruments. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <i2c.h> +#include <asm/arch/hardware.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return(0); +} + +static int dv_get_pllm_output(uint32_t pllm) +{ + return (pllm + 1) * (CFG_HZ_CLOCK / 1000000); +} + +void dv_display_clk_infos(void) +{ + printf("ARM Clock: %dMHz\n", dv_get_pllm_output(REG(PLL1_PLLM)) / 2); + printf("DDR Clock: %dMHz\n", dv_get_pllm_output(REG(PLL2_PLLM)) / + ((REG(PLL2_DIV2) & 0x1f) + 1) / 2); +} + +/* Read ethernet MAC address from EEPROM for DVEVM compatible boards. + * Returns 1 if found, 0 otherwise. + */ +int dvevm_read_mac_address(uint8_t *buf) +{ +#ifdef CFG_I2C_EEPROM_ADDR + /* Read MAC address. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x7F00, CFG_I2C_EEPROM_ADDR_LEN, + (uint8_t *) &buf[0], 6)) + goto i2cerr; + + /* Check that MAC address is not null. */ + if (memcmp(buf, "\0\0\0\0\0\0", 6) == 0) + goto err; + + return 1; /* Found */ + +i2cerr: + printf("Read from EEPROM @ 0x%02x failed\n", CFG_I2C_EEPROM_ADDR); +err: +#endif /* CFG_I2C_EEPROM_ADDR */ + + return 0; +} + +/* If there is a MAC address in the environment, and if it is not identical to + * the MAC address in the ROM, then a warning is printed and the MAC address + * from the environment is used. + * + * If there is no MAC address in the environment, then it will be initialized + * (silently) from the value in the ROM. + */ +void dv_configure_mac_address(uint8_t *rom_enetaddr) +{ + int i; + u_int8_t env_enetaddr[6]; + char *tmp = getenv("ethaddr"); + char *end; + + /* Read Ethernet MAC address from the U-Boot environment. + * If it is not defined, env_enetaddr[] will be cleared. */ + for (i = 0; i < 6; i++) { + env_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0; + if (tmp) + tmp = (*end) ? end+1 : end; + } + + /* Check if ROM and U-Boot environment MAC addresses match. */ + if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 && + memcmp(env_enetaddr, rom_enetaddr, 6) != 0) { + printf("Warning: MAC addresses don't match:\n"); + printf(" ROM MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n", + rom_enetaddr[0], rom_enetaddr[1], + rom_enetaddr[2], rom_enetaddr[3], + rom_enetaddr[4], rom_enetaddr[5]); + printf(" \"ethaddr\" value: %02X:%02X:%02X:%02X:%02X:%02X\n", + env_enetaddr[0], env_enetaddr[1], + env_enetaddr[2], env_enetaddr[3], + env_enetaddr[4], env_enetaddr[5]) ; + debug("### Using MAC address from environment\n"); + } + if (!tmp) { + char ethaddr[20]; + + /* There is no MAC address in the environment, so we initialize + * it from the value in the ROM. */ + sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X", + rom_enetaddr[0], rom_enetaddr[1], + rom_enetaddr[2], rom_enetaddr[3], + rom_enetaddr[4], rom_enetaddr[5]) ; + debug("### Setting environment from ROM MAC address = \"%s\"\n", + ethaddr); + setenv("ethaddr", ethaddr); + } +} diff --git a/board/davinci/common/misc.h b/board/davinci/common/misc.h new file mode 100644 index 00000000000..4a57dbb89b6 --- /dev/null +++ b/board/davinci/common/misc.h @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2008 Lyrtech <www.lyrtech.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __MISC_H +#define __MISC_H + +extern void timer_init(void); +extern int eth_hw_init(void); + +void dv_display_clk_infos(void); +int dvevm_read_mac_address(uint8_t *buf); +void dv_configure_mac_address(uint8_t *rom_enetaddr); + +#endif /* __MISC_H */ diff --git a/board/davinci/common/psc.c b/board/davinci/common/psc.c new file mode 100644 index 00000000000..00dc07c3f6f --- /dev/null +++ b/board/davinci/common/psc.c @@ -0,0 +1,117 @@ +/* + * Power and Sleep Controller (PSC) functions. + * + * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> + * Copyright (C) 2008 Lyrtech <www.lyrtech.com> + * Copyright (C) 2004 Texas Instruments. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <asm/arch/hardware.h> + +/* + * The DM6446 includes two separate power domains: "Always On" and "DSP". The + * "Always On" power domain is always on when the chip is on. The "Always On" + * domain is powered by the VDD pins of the DM6446. The majority of the + * DM6446's modules lie within the "Always On" power domain. A separate + * domain called the "DSP" domain houses the C64x+ and VICP. The "DSP" domain + * is not always on. The "DSP" power domain is powered by the CVDDDSP pins of + * the DM6446. + */ + +/* Works on Always On power domain only (no PD argument) */ +void lpsc_on(unsigned int id) +{ + dv_reg_p mdstat, mdctl; + + if (id >= DAVINCI_LPSC_GEM) + return; /* Don't work on DSP Power Domain */ + + mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); + mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); + + while (REG(PSC_PTSTAT) & 0x01); + + if ((*mdstat & 0x1f) == 0x03) + return; /* Already on and enabled */ + + *mdctl |= 0x03; + + /* Special treatment for some modules as for sprue14 p.7.4.2 */ + switch (id) { + case DAVINCI_LPSC_VPSSSLV: + case DAVINCI_LPSC_EMAC: + case DAVINCI_LPSC_EMAC_WRAPPER: + case DAVINCI_LPSC_MDIO: + case DAVINCI_LPSC_USB: + case DAVINCI_LPSC_ATA: + case DAVINCI_LPSC_VLYNQ: + case DAVINCI_LPSC_UHPI: + case DAVINCI_LPSC_DDR_EMIF: + case DAVINCI_LPSC_AEMIF: + case DAVINCI_LPSC_MMC_SD: + case DAVINCI_LPSC_MEMSTICK: + case DAVINCI_LPSC_McBSP: + case DAVINCI_LPSC_GPIO: + *mdctl |= 0x200; + break; + } + + REG(PSC_PTCMD) = 0x01; + + while (REG(PSC_PTSTAT) & 0x03); + while ((*mdstat & 0x1f) != 0x03); /* Probably an overkill... */ +} + +/* If DSPLINK is used, we don't want U-Boot to power on the DSP. */ +#if !defined(CFG_USE_DSPLINK) +void dsp_on(void) +{ + int i; + + if (REG(PSC_PDSTAT1) & 0x1f) + return; /* Already on */ + + REG(PSC_GBLCTL) |= 0x01; + REG(PSC_PDCTL1) |= 0x01; + REG(PSC_PDCTL1) &= ~0x100; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; + REG(PSC_PTCMD) = 0x02; + + for (i = 0; i < 100; i++) { + if (REG(PSC_EPCPR) & 0x02) + break; + } + + REG(PSC_CHP_SHRTSW) = 0x01; + REG(PSC_PDCTL1) |= 0x100; + REG(PSC_EPCCR) = 0x02; + + for (i = 0; i < 100; i++) { + if (!(REG(PSC_PTSTAT) & 0x02)) + break; + } + + REG(PSC_GBLCTL) &= ~0x1f; +} +#endif /* CFG_USE_DSPLINK */ diff --git a/board/integratorap/memsetup.S b/board/davinci/common/psc.h index da43cb6a71b..6ab2575ae74 100644 --- a/board/integratorap/memsetup.S +++ b/board/davinci/common/psc.h @@ -1,13 +1,13 @@ /* - * Memory setup for integratorAP + * Copyright (C) 2008 Lyrtech <www.lyrtech.com> * * See file CREDITS for list of people who contributed to this * project. * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of @@ -16,14 +16,13 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -/* - * Memory setup - * - the reset defaults are assumed sufficient + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -.globl memsetup -memsetup: - mov pc,lr +#ifndef __PSC_H +#define __PSC_H + +void lpsc_on(unsigned int id); +void dsp_on(void); + +#endif /* __PSC_H */ diff --git a/board/davinci/dv-evm/dv_board.c b/board/davinci/dv-evm/dv_board.c deleted file mode 100644 index 834eb68bd28..00000000000 --- a/board/davinci/dv-evm/dv_board.c +++ /dev/null @@ -1,202 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Parts are shamelessly stolen from various TI sources, original copyright - * follows: - * ----------------------------------------------------------------- - * - * Copyright (C) 2004 Texas Instruments. - * - * ---------------------------------------------------------------------------- - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * ---------------------------------------------------------------------------- - */ - -#include <common.h> -#include <i2c.h> -#include <asm/arch/hardware.h> -#include <asm/arch/emac_defs.h> - -DECLARE_GLOBAL_DATA_PTR; - -extern void timer_init(void); -extern int eth_hw_init(void); - - -/* Works on Always On power domain only (no PD argument) */ -void lpsc_on(unsigned int id) -{ - dv_reg_p mdstat, mdctl; - - if (id >= DAVINCI_LPSC_GEM) - return; /* Don't work on DSP Power Domain */ - - mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); - mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); - - while (REG(PSC_PTSTAT) & 0x01) {;} - - if ((*mdstat & 0x1f) == 0x03) - return; /* Already on and enabled */ - - *mdctl |= 0x03; - - /* Special treatment for some modules as for sprue14 p.7.4.2 */ - if ( (id == DAVINCI_LPSC_VPSSSLV) || - (id == DAVINCI_LPSC_EMAC) || - (id == DAVINCI_LPSC_EMAC_WRAPPER) || - (id == DAVINCI_LPSC_MDIO) || - (id == DAVINCI_LPSC_USB) || - (id == DAVINCI_LPSC_ATA) || - (id == DAVINCI_LPSC_VLYNQ) || - (id == DAVINCI_LPSC_UHPI) || - (id == DAVINCI_LPSC_DDR_EMIF) || - (id == DAVINCI_LPSC_AEMIF) || - (id == DAVINCI_LPSC_MMC_SD) || - (id == DAVINCI_LPSC_MEMSTICK) || - (id == DAVINCI_LPSC_McBSP) || - (id == DAVINCI_LPSC_GPIO) - ) - *mdctl |= 0x200; - - REG(PSC_PTCMD) = 0x01; - - while (REG(PSC_PTSTAT) & 0x03) {;} - while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */ -} - -void dsp_on(void) -{ - int i; - - if (REG(PSC_PDSTAT1) & 0x1f) - return; /* Already on */ - - REG(PSC_GBLCTL) |= 0x01; - REG(PSC_PDCTL1) |= 0x01; - REG(PSC_PDCTL1) &= ~0x100; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; - REG(PSC_PTCMD) = 0x02; - - for (i = 0; i < 100; i++) { - if (REG(PSC_EPCPR) & 0x02) - break; - } - - REG(PSC_CHP_SHRTSW) = 0x01; - REG(PSC_PDCTL1) |= 0x100; - REG(PSC_EPCCR) = 0x02; - - for (i = 0; i < 100; i++) { - if (!(REG(PSC_PTSTAT) & 0x02)) - break; - } - - REG(PSC_GBLCTL) &= ~0x1f; -} - - -int board_init(void) -{ - /* arch number of the board */ - gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_EVM; - - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - /* Workaround for TMS320DM6446 errata 1.3.22 */ - REG(PSC_SILVER_BULLET) = 0; - - /* Power on required peripherals */ - lpsc_on(DAVINCI_LPSC_EMAC); - lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); - lpsc_on(DAVINCI_LPSC_MDIO); - lpsc_on(DAVINCI_LPSC_I2C); - lpsc_on(DAVINCI_LPSC_UART0); - lpsc_on(DAVINCI_LPSC_TIMER1); - lpsc_on(DAVINCI_LPSC_GPIO); - - /* Powerup the DSP */ - dsp_on(); - - /* Bringup UART0 out of reset */ - REG(UART0_PWREMU_MGMT) = 0x0000e003; - - /* Enable GIO3.3V cells used for EMAC */ - REG(VDD3P3V_PWDN) = 0; - - /* Enable UART0 MUX lines */ - REG(PINMUX1) |= 1; - - /* Enable EMAC and AEMIF pins */ - REG(PINMUX0) = 0x80000c1f; - - /* Enable I2C pin Mux */ - REG(PINMUX1) |= (1 << 7); - - /* Set the Bus Priority Register to appropriate value */ - REG(VBPR) = 0x20; - - timer_init(); - - return(0); -} - -int misc_init_r (void) -{ - u_int8_t tmp[20], buf[10]; - int i = 0; - int clk = 0; - - clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1); - - printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2); - printf ("DDR Clock : %dMHz\n", (clk / 2)); - - /* Set Ethernet MAC address from EEPROM */ - if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x7f00, CFG_I2C_EEPROM_ADDR_LEN, buf, 6)) { - printf("\nEEPROM @ 0x%02x read FAILED!!!\n", CFG_I2C_EEPROM_ADDR); - } else { - tmp[0] = 0xff; - for (i = 0; i < 6; i++) - tmp[0] &= buf[i]; - - if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) { - sprintf((char *)&tmp[0], "%02x:%02x:%02x:%02x:%02x:%02x", - buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]); - setenv("ethaddr", (char *)&tmp[0]); - } - } - - if (!eth_hw_init()) - printf("ethernet init failed!\n"); - - i2c_read (0x39, 0x00, 1, (u_int8_t *)&i, 1); - - setenv ("videostd", ((i & 0x80) ? "pal" : "ntsc")); - - return(0); -} - -int dram_init(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return(0); -} diff --git a/board/davinci/dv-evm/Makefile b/board/davinci/dvevm/Makefile index 579efe26230..fb31ee42b25 100644 --- a/board/davinci/dv-evm/Makefile +++ b/board/davinci/dvevm/Makefile @@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := dv_board.o +COBJS := $(BOARD).o SOBJS := board_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/board/davinci/dv-evm/board_init.S b/board/davinci/dvevm/board_init.S index 22d8adc18ca..22d8adc18ca 100644 --- a/board/davinci/dv-evm/board_init.S +++ b/board/davinci/dvevm/board_init.S diff --git a/board/davinci/dv-evm/config.mk b/board/davinci/dvevm/config.mk index aa89d0ec8ae..aa89d0ec8ae 100644 --- a/board/davinci/dv-evm/config.mk +++ b/board/davinci/dvevm/config.mk diff --git a/board/davinci/dvevm/dvevm.c b/board/davinci/dvevm/dvevm.c new file mode 100644 index 00000000000..151f8a9007f --- /dev/null +++ b/board/davinci/dvevm/dvevm.c @@ -0,0 +1,103 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> + * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: + * ----------------------------------------------------------------- + * + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <i2c.h> +#include <asm/arch/hardware.h> +#include <asm/arch/emac_defs.h> +#include "../common/psc.h" +#include "../common/misc.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_EVM; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* Workaround for TMS320DM6446 errata 1.3.22 */ + REG(PSC_SILVER_BULLET) = 0; + + /* Power on required peripherals */ + lpsc_on(DAVINCI_LPSC_EMAC); + lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); + lpsc_on(DAVINCI_LPSC_MDIO); + lpsc_on(DAVINCI_LPSC_I2C); + lpsc_on(DAVINCI_LPSC_UART0); + lpsc_on(DAVINCI_LPSC_TIMER1); + lpsc_on(DAVINCI_LPSC_GPIO); + +#if !defined(CFG_USE_DSPLINK) + /* Powerup the DSP */ + dsp_on(); +#endif /* CFG_USE_DSPLINK */ + + /* Bringup UART0 out of reset */ + REG(UART0_PWREMU_MGMT) = 0x0000e003; + + /* Enable GIO3.3V cells used for EMAC */ + REG(VDD3P3V_PWDN) = 0; + + /* Enable UART0 MUX lines */ + REG(PINMUX1) |= 1; + + /* Enable EMAC and AEMIF pins */ + REG(PINMUX0) = 0x80000c1f; + + /* Enable I2C pin Mux */ + REG(PINMUX1) |= (1 << 7); + + /* Set the Bus Priority Register to appropriate value */ + REG(VBPR) = 0x20; + + timer_init(); + + return(0); +} + +int misc_init_r(void) +{ + uint8_t video_mode; + uint8_t eeprom_enetaddr[6]; + + dv_display_clk_infos(); + + /* Read Ethernet MAC address from EEPROM if available. */ + if (dvevm_read_mac_address(eeprom_enetaddr)) + dv_configure_mac_address(eeprom_enetaddr); + + if (!eth_hw_init()) + printf("ethernet init failed!\n"); + + i2c_read(0x39, 0x00, 1, &video_mode, 1); + + setenv("videostd", ((video_mode & 0x80) ? "pal" : "ntsc")); + + return(0); +} diff --git a/board/davinci/dv-evm/u-boot.lds b/board/davinci/dvevm/u-boot.lds index a4fcd1a9bb4..a4fcd1a9bb4 100644 --- a/board/davinci/dv-evm/u-boot.lds +++ b/board/davinci/dvevm/u-boot.lds diff --git a/board/davinci/schmoogie/Makefile b/board/davinci/schmoogie/Makefile index 579efe26230..fb31ee42b25 100644 --- a/board/davinci/schmoogie/Makefile +++ b/board/davinci/schmoogie/Makefile @@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := dv_board.o +COBJS := $(BOARD).o SOBJS := board_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/board/davinci/schmoogie/dv_board.c b/board/davinci/schmoogie/schmoogie.c index 30175461f0c..99fd32629ff 100644 --- a/board/davinci/schmoogie/dv_board.c +++ b/board/davinci/schmoogie/schmoogie.c @@ -28,89 +28,11 @@ #include <i2c.h> #include <asm/arch/hardware.h> #include <asm/arch/emac_defs.h> +#include "../common/psc.h" +#include "../common/misc.h" DECLARE_GLOBAL_DATA_PTR; -extern void timer_init(void); -extern int eth_hw_init(void); - - -/* Works on Always On power domain only (no PD argument) */ -void lpsc_on(unsigned int id) -{ - dv_reg_p mdstat, mdctl; - - if (id >= DAVINCI_LPSC_GEM) - return; /* Don't work on DSP Power Domain */ - - mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); - mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); - - while (REG(PSC_PTSTAT) & 0x01) {;} - - if ((*mdstat & 0x1f) == 0x03) - return; /* Already on and enabled */ - - *mdctl |= 0x03; - - /* Special treatment for some modules as for sprue14 p.7.4.2 */ - if ( (id == DAVINCI_LPSC_VPSSSLV) || - (id == DAVINCI_LPSC_EMAC) || - (id == DAVINCI_LPSC_EMAC_WRAPPER) || - (id == DAVINCI_LPSC_MDIO) || - (id == DAVINCI_LPSC_USB) || - (id == DAVINCI_LPSC_ATA) || - (id == DAVINCI_LPSC_VLYNQ) || - (id == DAVINCI_LPSC_UHPI) || - (id == DAVINCI_LPSC_DDR_EMIF) || - (id == DAVINCI_LPSC_AEMIF) || - (id == DAVINCI_LPSC_MMC_SD) || - (id == DAVINCI_LPSC_MEMSTICK) || - (id == DAVINCI_LPSC_McBSP) || - (id == DAVINCI_LPSC_GPIO) - ) - *mdctl |= 0x200; - - REG(PSC_PTCMD) = 0x01; - - while (REG(PSC_PTSTAT) & 0x03) {;} - while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */ -} - -void dsp_on(void) -{ - int i; - - if (REG(PSC_PDSTAT1) & 0x1f) - return; /* Already on */ - - REG(PSC_GBLCTL) |= 0x01; - REG(PSC_PDCTL1) |= 0x01; - REG(PSC_PDCTL1) &= ~0x100; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; - REG(PSC_PTCMD) = 0x02; - - for (i = 0; i < 100; i++) { - if (REG(PSC_EPCPR) & 0x02) - break; - } - - REG(PSC_CHP_SHRTSW) = 0x01; - REG(PSC_PDCTL1) |= 0x100; - REG(PSC_EPCCR) = 0x02; - - for (i = 0; i < 100; i++) { - if (!(REG(PSC_PTSTAT) & 0x02)) - break; - } - - REG(PSC_GBLCTL) &= ~0x1f; -} - - int board_init(void) { /* arch number of the board */ @@ -131,8 +53,10 @@ int board_init(void) lpsc_on(DAVINCI_LPSC_TIMER1); lpsc_on(DAVINCI_LPSC_GPIO); +#if !defined(CFG_USE_DSPLINK) /* Powerup the DSP */ dsp_on(); +#endif /* CFG_USE_DSPLINK */ /* Bringup UART0 out of reset */ REG(UART0_PWREMU_MGMT) = 0x0000e003; @@ -157,11 +81,10 @@ int board_init(void) return(0); } -int misc_init_r (void) +int misc_init_r(void) { u_int8_t tmp[20], buf[10]; int i = 0; - int clk = 0; /* Set serial number from UID chip */ u_int8_t crc_tbl[256] = { @@ -199,17 +122,15 @@ int misc_init_r (void) 0xb6, 0xe8, 0x0a, 0x54, 0xd7, 0x89, 0x6b, 0x35 }; - clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1); - - printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2); - printf ("DDR Clock : %dMHz\n", (clk / 2)); + dv_display_clk_infos(); /* Set serial number from UID chip */ if (i2c_read(CFG_UID_ADDR, 0, 1, buf, 8)) { printf("\nUID @ 0x%02x read FAILED!!!\n", CFG_UID_ADDR); forceenv("serial#", "FAILED"); } else { - if (buf[0] != 0x70) { /* Device Family Code */ + if (buf[0] != 0x70) { + /* Device Family Code */ printf("\nUID @ 0x%02x read FAILED!!!\n", CFG_UID_ADDR); forceenv("serial#", "FAILED"); } @@ -234,11 +155,3 @@ int misc_init_r (void) return(0); } - -int dram_init(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return(0); -} diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c index f41081fd113..f47ba0f3bd4 100644 --- a/board/davinci/sffsdr/sffsdr.c +++ b/board/davinci/sffsdr/sffsdr.c @@ -31,6 +31,8 @@ #include <i2c.h> #include <asm/arch/hardware.h> #include <asm/arch/emac_defs.h> +#include "../common/psc.h" +#include "../common/misc.h" #define DAVINCI_A3CR (0x01E00014) /* EMIF-A CS3 config register. */ #define DAVINCI_A3CR_VAL (0x3FFFFFFD) /* EMIF-A CS3 value for FPGA. */ @@ -41,89 +43,6 @@ DECLARE_GLOBAL_DATA_PTR; -extern void timer_init(void); -extern int eth_hw_init(void); - - -/* Works on Always On power domain only (no PD argument) */ -void lpsc_on(unsigned int id) -{ - dv_reg_p mdstat, mdctl; - - if (id >= DAVINCI_LPSC_GEM) - return; /* Don't work on DSP Power Domain */ - - mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); - mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); - - while (REG(PSC_PTSTAT) & 0x01); - - if ((*mdstat & 0x1f) == 0x03) - return; /* Already on and enabled */ - - *mdctl |= 0x03; - - /* Special treatment for some modules as for sprue14 p.7.4.2 */ - switch (id) { - case DAVINCI_LPSC_VPSSSLV: - case DAVINCI_LPSC_EMAC: - case DAVINCI_LPSC_EMAC_WRAPPER: - case DAVINCI_LPSC_MDIO: - case DAVINCI_LPSC_USB: - case DAVINCI_LPSC_ATA: - case DAVINCI_LPSC_VLYNQ: - case DAVINCI_LPSC_UHPI: - case DAVINCI_LPSC_DDR_EMIF: - case DAVINCI_LPSC_AEMIF: - case DAVINCI_LPSC_MMC_SD: - case DAVINCI_LPSC_MEMSTICK: - case DAVINCI_LPSC_McBSP: - case DAVINCI_LPSC_GPIO: - *mdctl |= 0x200; - break; - } - - REG(PSC_PTCMD) = 0x01; - - while (REG(PSC_PTSTAT) & 0x03); - while ((*mdstat & 0x1f) != 0x03); /* Probably an overkill... */ -} - -#if !defined(CFG_USE_DSPLINK) -void dsp_on(void) -{ - int i; - - if (REG(PSC_PDSTAT1) & 0x1f) - return; /* Already on */ - - REG(PSC_GBLCTL) |= 0x01; - REG(PSC_PDCTL1) |= 0x01; - REG(PSC_PDCTL1) &= ~0x100; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; - REG(PSC_PTCMD) = 0x02; - - for (i = 0; i < 100; i++) { - if (REG(PSC_EPCPR) & 0x02) - break; - } - - REG(PSC_CHP_SHRTSW) = 0x01; - REG(PSC_PDCTL1) |= 0x100; - REG(PSC_EPCCR) = 0x02; - - for (i = 0; i < 100; i++) { - if (!(REG(PSC_PTSTAT) & 0x02)) - break; - } - - REG(PSC_GBLCTL) &= ~0x1f; -} -#endif /* CFG_USE_DSPLINK */ - int board_init(void) { /* arch number of the board */ @@ -172,8 +91,10 @@ int board_init(void) return(0); } -/* Read ethernet MAC address from Integrity data structure inside EEPROM. */ -int read_mac_address(uint8_t *buf) +/* Read ethernet MAC address from Integrity data structure inside EEPROM. + * Returns 1 if found, 0 otherwise. + */ +static int sffsdr_read_mac_address(uint8_t *buf) { u_int32_t value, mac[2], address; @@ -182,7 +103,7 @@ int read_mac_address(uint8_t *buf) CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) goto err; if (value != INTEGRITY_CHECKWORD_VALUE) - return 1; + return 0; /* Read SYSCFG structure offset. */ if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_SYSCFG_OFFSET, @@ -216,30 +137,23 @@ int read_mac_address(uint8_t *buf) buf[4] = mac[1] >> 24; buf[5] = mac[1] >> 16; - return 0; + return 1; /* Found */ err: printf("Read from EEPROM @ 0x%02x failed\n", CFG_I2C_EEPROM_ADDR); - return 1; + return 0; } /* Platform dependent initialisation. */ int misc_init_r(void) { - int i; - u_int8_t i2cbuf; - u_int8_t env_enetaddr[6], eeprom_enetaddr[6]; - char *tmp = getenv("ethaddr"); - char *end; - int clk; + uint8_t i2cbuf; + uint8_t eeprom_enetaddr[6]; /* EMIF-A CS3 configuration for FPGA. */ REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL; - clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1); - - printf("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27) / 2); - printf("DDR Clock: %dMHz\n", (clk / 2)); + dv_display_clk_infos(); /* Configure I2C switch (PCA9543) to enable channel 0. */ i2cbuf = CFG_I2C_PCA9543_ENABLE_CH0; @@ -249,43 +163,9 @@ int misc_init_r(void) return 1; } - /* Read Ethernet MAC address from the U-Boot environment. */ - for (i = 0; i < 6; i++) { - env_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0; - if (tmp) - tmp = (*end) ? end+1 : end; - } - - /* Read Ethernet MAC address from EEPROM. */ - if (read_mac_address(eeprom_enetaddr) == 0) { - if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 && - memcmp(env_enetaddr, eeprom_enetaddr, 6) != 0) { - printf("\nWarning: MAC addresses don't match:\n"); - printf("\tHW MAC address: " - "%02X:%02X:%02X:%02X:%02X:%02X\n", - eeprom_enetaddr[0], eeprom_enetaddr[1], - eeprom_enetaddr[2], eeprom_enetaddr[3], - eeprom_enetaddr[4], eeprom_enetaddr[5]); - printf("\t\"ethaddr\" value: " - "%02X:%02X:%02X:%02X:%02X:%02X\n", - env_enetaddr[0], env_enetaddr[1], - env_enetaddr[2], env_enetaddr[3], - env_enetaddr[4], env_enetaddr[5]) ; - debug("### Set MAC addr from environment\n"); - memcpy(eeprom_enetaddr, env_enetaddr, 6); - } - if (!tmp) { - char ethaddr[20]; - - sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X", - eeprom_enetaddr[0], eeprom_enetaddr[1], - eeprom_enetaddr[2], eeprom_enetaddr[3], - eeprom_enetaddr[4], eeprom_enetaddr[5]) ; - debug("### Set environment from HW MAC addr = \"%s\"\n", - ethaddr); - setenv("ethaddr", ethaddr); - } - } + /* Read Ethernet MAC address from EEPROM if available. */ + if (sffsdr_read_mac_address(eeprom_enetaddr)) + dv_configure_mac_address(eeprom_enetaddr); if (!eth_hw_init()) printf("Ethernet init failed\n"); @@ -296,11 +176,3 @@ int misc_init_r(void) return(0); } - -int dram_init(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return(0); -} diff --git a/board/davinci/sonata/Makefile b/board/davinci/sonata/Makefile index 579efe26230..fb31ee42b25 100644 --- a/board/davinci/sonata/Makefile +++ b/board/davinci/sonata/Makefile @@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := dv_board.o +COBJS := $(BOARD).o SOBJS := board_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/board/davinci/sonata/dv_board.c b/board/davinci/sonata/dv_board.c deleted file mode 100644 index a6f9bc71c78..00000000000 --- a/board/davinci/sonata/dv_board.c +++ /dev/null @@ -1,199 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Parts are shamelessly stolen from various TI sources, original copyright - * follows: - * ----------------------------------------------------------------- - * - * Copyright (C) 2004 Texas Instruments. - * - * ---------------------------------------------------------------------------- - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * ---------------------------------------------------------------------------- - */ - -#include <common.h> -#include <i2c.h> -#include <asm/arch/hardware.h> -#include <asm/arch/emac_defs.h> - -DECLARE_GLOBAL_DATA_PTR; - -extern void timer_init(void); -extern int eth_hw_init(void); - - -/* Works on Always On power domain only (no PD argument) */ -void lpsc_on(unsigned int id) -{ - dv_reg_p mdstat, mdctl; - - if (id >= DAVINCI_LPSC_GEM) - return; /* Don't work on DSP Power Domain */ - - mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); - mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); - - while (REG(PSC_PTSTAT) & 0x01) {;} - - if ((*mdstat & 0x1f) == 0x03) - return; /* Already on and enabled */ - - *mdctl |= 0x03; - - /* Special treatment for some modules as for sprue14 p.7.4.2 */ - if ( (id == DAVINCI_LPSC_VPSSSLV) || - (id == DAVINCI_LPSC_EMAC) || - (id == DAVINCI_LPSC_EMAC_WRAPPER) || - (id == DAVINCI_LPSC_MDIO) || - (id == DAVINCI_LPSC_USB) || - (id == DAVINCI_LPSC_ATA) || - (id == DAVINCI_LPSC_VLYNQ) || - (id == DAVINCI_LPSC_UHPI) || - (id == DAVINCI_LPSC_DDR_EMIF) || - (id == DAVINCI_LPSC_AEMIF) || - (id == DAVINCI_LPSC_MMC_SD) || - (id == DAVINCI_LPSC_MEMSTICK) || - (id == DAVINCI_LPSC_McBSP) || - (id == DAVINCI_LPSC_GPIO) - ) - *mdctl |= 0x200; - - REG(PSC_PTCMD) = 0x01; - - while (REG(PSC_PTSTAT) & 0x03) {;} - while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */ -} - -void dsp_on(void) -{ - int i; - - if (REG(PSC_PDSTAT1) & 0x1f) - return; /* Already on */ - - REG(PSC_GBLCTL) |= 0x01; - REG(PSC_PDCTL1) |= 0x01; - REG(PSC_PDCTL1) &= ~0x100; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; - REG(PSC_PTCMD) = 0x02; - - for (i = 0; i < 100; i++) { - if (REG(PSC_EPCPR) & 0x02) - break; - } - - REG(PSC_CHP_SHRTSW) = 0x01; - REG(PSC_PDCTL1) |= 0x100; - REG(PSC_EPCCR) = 0x02; - - for (i = 0; i < 100; i++) { - if (!(REG(PSC_PTSTAT) & 0x02)) - break; - } - - REG(PSC_GBLCTL) &= ~0x1f; -} - - -int board_init(void) -{ - /* arch number of the board */ - gd->bd->bi_arch_number = MACH_TYPE_SONATA; - - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - /* Workaround for TMS320DM6446 errata 1.3.22 */ - REG(PSC_SILVER_BULLET) = 0; - - /* Power on required peripherals */ - lpsc_on(DAVINCI_LPSC_EMAC); - lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); - lpsc_on(DAVINCI_LPSC_MDIO); - lpsc_on(DAVINCI_LPSC_I2C); - lpsc_on(DAVINCI_LPSC_UART0); - lpsc_on(DAVINCI_LPSC_TIMER1); - lpsc_on(DAVINCI_LPSC_GPIO); - - /* Powerup the DSP */ - dsp_on(); - - /* Bringup UART0 out of reset */ - REG(UART0_PWREMU_MGMT) = 0x0000e003; - - /* Enable GIO3.3V cells used for EMAC */ - REG(VDD3P3V_PWDN) = 0; - - /* Enable UART0 MUX lines */ - REG(PINMUX1) |= 1; - - /* Enable EMAC and AEMIF pins */ - REG(PINMUX0) = 0x80000c1f; - - /* Enable I2C pin Mux */ - REG(PINMUX1) |= (1 << 7); - - /* Set the Bus Priority Register to appropriate value */ - REG(VBPR) = 0x20; - - timer_init(); - - return(0); -} - -int misc_init_r (void) -{ - u_int8_t tmp[20], buf[10]; - int i = 0; - int clk = 0; - - - clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1); - - printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2); - printf ("DDR Clock : %dMHz\n", (clk / 2)); - - /* Set Ethernet MAC address from EEPROM */ - if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x7f00, CFG_I2C_EEPROM_ADDR_LEN, buf, 6)) { - printf("\nEEPROM @ 0x%02x read FAILED!!!\n", CFG_I2C_EEPROM_ADDR); - } else { - tmp[0] = 0xff; - for (i = 0; i < 6; i++) - tmp[0] &= buf[i]; - - if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) { - sprintf((char *)&tmp[0], "%02x:%02x:%02x:%02x:%02x:%02x", - buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]); - setenv("ethaddr", (char *)&tmp[0]); - } - } - - if (!eth_hw_init()) - printf("ethernet init failed!\n"); - - return(0); -} - -int dram_init(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return(0); -} diff --git a/board/davinci/sonata/sonata.c b/board/davinci/sonata/sonata.c new file mode 100644 index 00000000000..a6fe82593a3 --- /dev/null +++ b/board/davinci/sonata/sonata.c @@ -0,0 +1,97 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> + * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: + * ----------------------------------------------------------------- + * + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <asm/arch/hardware.h> +#include <asm/arch/emac_defs.h> +#include "../common/psc.h" +#include "../common/misc.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_SONATA; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* Workaround for TMS320DM6446 errata 1.3.22 */ + REG(PSC_SILVER_BULLET) = 0; + + /* Power on required peripherals */ + lpsc_on(DAVINCI_LPSC_EMAC); + lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); + lpsc_on(DAVINCI_LPSC_MDIO); + lpsc_on(DAVINCI_LPSC_I2C); + lpsc_on(DAVINCI_LPSC_UART0); + lpsc_on(DAVINCI_LPSC_TIMER1); + lpsc_on(DAVINCI_LPSC_GPIO); + +#if !defined(CFG_USE_DSPLINK) + /* Powerup the DSP */ + dsp_on(); +#endif /* CFG_USE_DSPLINK */ + + /* Bringup UART0 out of reset */ + REG(UART0_PWREMU_MGMT) = 0x0000e003; + + /* Enable GIO3.3V cells used for EMAC */ + REG(VDD3P3V_PWDN) = 0; + + /* Enable UART0 MUX lines */ + REG(PINMUX1) |= 1; + + /* Enable EMAC and AEMIF pins */ + REG(PINMUX0) = 0x80000c1f; + + /* Enable I2C pin Mux */ + REG(PINMUX1) |= (1 << 7); + + /* Set the Bus Priority Register to appropriate value */ + REG(VBPR) = 0x20; + + timer_init(); + + return(0); +} + +int misc_init_r(void) +{ + uint8_t eeprom_enetaddr[6]; + + dv_display_clk_infos(); + + /* Read Ethernet MAC address from EEPROM if available. */ + if (dvevm_read_mac_address(eeprom_enetaddr)) + dv_configure_mac_address(eeprom_enetaddr); + + if (!eth_hw_init()) + printf("ethernet init failed!\n"); + + return(0); +} diff --git a/board/integratorap/Makefile b/board/integratorap/Makefile index f78de3a1001..79f501a3ec3 100644 --- a/board/integratorap/Makefile +++ b/board/integratorap/Makefile @@ -30,7 +30,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a COBJS := integratorap.o flash.o -SOBJS := lowlevel_init.o memsetup.o +SOBJS := lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/integratorcp/Makefile b/board/integratorcp/Makefile index 9201accb266..92a1a07b03b 100644 --- a/board/integratorcp/Makefile +++ b/board/integratorcp/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a COBJS := integratorcp.o flash.o -SOBJS := lowlevel_init.o memsetup.o +SOBJS := lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/samsung/smdk6400/.gitignore b/board/samsung/smdk6400/.gitignore new file mode 100644 index 00000000000..25ab492c502 --- /dev/null +++ b/board/samsung/smdk6400/.gitignore @@ -0,0 +1,5 @@ +# +# Generated files +# + +/config.tmp diff --git a/board/samsung/smdk6400/Makefile b/board/samsung/smdk6400/Makefile new file mode 100644 index 00000000000..71302205ebc --- /dev/null +++ b/board/samsung/smdk6400/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := smdk6400.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(SOBJS) $(OBJS) + $(AR) $(ARFLAGS) $@ $(SOBJS) $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/samsung/smdk6400/config.mk b/board/samsung/smdk6400/config.mk new file mode 100644 index 00000000000..298d387ae7c --- /dev/null +++ b/board/samsung/smdk6400/config.mk @@ -0,0 +1,30 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <gj@denx.de> +# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> +# +# SAMSUNG SMDK6400 board with mDirac3 (ARM1176) cpu +# +# see http://www.samsung.com/ for more information on SAMSUNG + +# On SMDK6400 we use the 64 MB SDRAM bank at +# +# 0x50000000 to 0x58000000 +# +# Linux-Kernel is expected to be at 0x50008000, entry 0x50008000 +# +# we load ourselves to 0x57e00000 without MMU +# with MMU, load address is changed to 0xc7e00000 +# +# download area is 0x5000c000 + +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp + +ifndef CONFIG_NAND_SPL +TEXT_BASE = $(RAM_TEXT) +else +TEXT_BASE = 0 +endif diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S new file mode 100644 index 00000000000..034c810f7b6 --- /dev/null +++ b/board/samsung/smdk6400/lowlevel_init.S @@ -0,0 +1,316 @@ +/* + * Memory Setup stuff - taken from blob memsetup.S + * + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and + * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl) + * + * Modified for the Samsung SMDK2410 by + * (C) Copyright 2002 + * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#include <config.h> +#include <version.h> + +#include <s3c6400.h> + +#ifdef CONFIG_SERIAL1 +#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART0_OFFSET) +#elif defined(CONFIG_SERIAL2) +#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART1_OFFSET) +#else +#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART2_OFFSET) +#endif + +_TEXT_BASE: + .word TEXT_BASE + + .globl lowlevel_init +lowlevel_init: + mov r12, lr + + /* LED on only #8 */ + ldr r0, =ELFIN_GPIO_BASE + ldr r1, =0x55540000 + str r1, [r0, #GPNCON_OFFSET] + + ldr r1, =0x55555555 + str r1, [r0, #GPNPUD_OFFSET] + + ldr r1, =0xf000 + str r1, [r0, #GPNDAT_OFFSET] + + /* Disable Watchdog */ + ldr r0, =0x7e000000 @0x7e004000 + orr r0, r0, #0x4000 + mov r1, #0 + str r1, [r0] + + /* External interrupt pending clear */ + ldr r0, =(ELFIN_GPIO_BASE+EINTPEND_OFFSET) /*EINTPEND*/ + ldr r1, [r0] + str r1, [r0] + + ldr r0, =ELFIN_VIC0_BASE_ADDR @0x71200000 + ldr r1, =ELFIN_VIC1_BASE_ADDR @0x71300000 + + /* Disable all interrupts (VIC0 and VIC1) */ + mvn r3, #0x0 + str r3, [r0, #oINTMSK] + str r3, [r1, #oINTMSK] + + /* Set all interrupts as IRQ */ + mov r3, #0x0 + str r3, [r0, #oINTMOD] + str r3, [r1, #oINTMOD] + + /* Pending Interrupt Clear */ + mov r3, #0x0 + str r3, [r0, #oVECTADDR] + str r3, [r1, #oVECTADDR] + + /* init system clock */ + bl system_clock_init + +#ifndef CONFIG_NAND_SPL + /* for UART */ + bl uart_asm_init +#endif + +#ifdef CONFIG_BOOT_NAND + /* simple init for NAND */ + bl nand_asm_init +#endif + + bl mem_ctrl_asm_init + +/* Wakeup support. Don't know if it's going to be used, untested. */ + ldr r0, =(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET) + ldr r1, [r0] + bic r1, r1, #0xfffffff7 + cmp r1, #0x8 + beq wakeup_reset + +1: + mov lr, r12 + mov pc, lr + +wakeup_reset: + + /* Clear wakeup status register */ + ldr r0, =(ELFIN_CLOCK_POWER_BASE + WAKEUP_STAT_OFFSET) + ldr r1, [r0] + str r1, [r0] + + /* LED test */ + ldr r0, =ELFIN_GPIO_BASE + ldr r1, =0x3000 + str r1, [r0, #GPNDAT_OFFSET] + + /* Load return address and jump to kernel */ + ldr r0, =(ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET) + /* r1 = physical address of s3c6400_cpu_resume function */ + ldr r1, [r0] + /* Jump to kernel (sleep-s3c6400.S) */ + mov pc, r1 + nop + nop +/* + * system_clock_init: Initialize core clock and bus clock. + * void system_clock_init(void) + */ +system_clock_init: + ldr r0, =ELFIN_CLOCK_POWER_BASE /* 0x7e00f000 */ + +#ifdef CONFIG_SYNC_MODE + ldr r1, [r0, #OTHERS_OFFSET] + mov r2, #0x40 + orr r1, r1, r2 + str r1, [r0, #OTHERS_OFFSET] + + nop + nop + nop + nop + nop + + ldr r2, =0x80 + orr r1, r1, r2 + str r1, [r0, #OTHERS_OFFSET] + +check_syncack: + ldr r1, [r0, #OTHERS_OFFSET] + ldr r2, =0xf00 + and r1, r1, r2 + cmp r1, #0xf00 + bne check_syncack +#else /* ASYNC Mode */ + nop + nop + nop + nop + nop + + /* + * This was unconditional in original Samsung sources, but it doesn't + * seem to make much sense on S3C6400. + */ +#ifndef CONFIG_S3C6400 + ldr r1, [r0, #OTHERS_OFFSET] + bic r1, r1, #0xC0 + orr r1, r1, #0x40 + str r1, [r0, #OTHERS_OFFSET] + +wait_for_async: + ldr r1, [r0, #OTHERS_OFFSET] + and r1, r1, #0xf00 + cmp r1, #0x0 + bne wait_for_async +#endif + + ldr r1, [r0, #OTHERS_OFFSET] + bic r1, r1, #0x40 + str r1, [r0, #OTHERS_OFFSET] +#endif + + mov r1, #0xff00 + orr r1, r1, #0xff + str r1, [r0, #APLL_LOCK_OFFSET] + str r1, [r0, #MPLL_LOCK_OFFSET] + + /* Set Clock Divider */ + ldr r1, [r0, #CLK_DIV0_OFFSET] + bic r1, r1, #0x30000 + bic r1, r1, #0xff00 + bic r1, r1, #0xff + ldr r2, =CLK_DIV_VAL + orr r1, r1, r2 + str r1, [r0, #CLK_DIV0_OFFSET] + + ldr r1, =APLL_VAL + str r1, [r0, #APLL_CON_OFFSET] + ldr r1, =MPLL_VAL + str r1, [r0, #MPLL_CON_OFFSET] + + /* FOUT of EPLL is 96MHz */ + ldr r1, =0x200203 + str r1, [r0, #EPLL_CON0_OFFSET] + ldr r1, =0x0 + str r1, [r0, #EPLL_CON1_OFFSET] + + /* APLL, MPLL, EPLL select to Fout */ + ldr r1, [r0, #CLK_SRC_OFFSET] + orr r1, r1, #0x7 + str r1, [r0, #CLK_SRC_OFFSET] + + /* wait at least 200us to stablize all clock */ + mov r1, #0x10000 +1: subs r1, r1, #1 + bne 1b + + /* Synchronization for VIC port */ +#if defined(CONFIG_SYNC_MODE) + ldr r1, [r0, #OTHERS_OFFSET] + orr r1, r1, #0x20 + str r1, [r0, #OTHERS_OFFSET] +#elif !defined(CONFIG_S3C6400) + /* According to 661558um_S3C6400X_rev10.pdf 0x20 is reserved */ + ldr r1, [r0, #OTHERS_OFFSET] + bic r1, r1, #0x20 + str r1, [r0, #OTHERS_OFFSET] +#endif + mov pc, lr + + +#ifndef CONFIG_NAND_SPL +/* + * uart_asm_init: Initialize UART's pins + */ +uart_asm_init: + /* set GPIO to enable UART */ + ldr r0, =ELFIN_GPIO_BASE + ldr r1, =0x220022 + str r1, [r0, #GPACON_OFFSET] + mov pc, lr +#endif + +#ifdef CONFIG_BOOT_NAND +/* + * NAND Interface init for SMDK6400 + */ +nand_asm_init: + ldr r0, =ELFIN_NAND_BASE + ldr r1, [r0, #NFCONF_OFFSET] + orr r1, r1, #0x70 + orr r1, r1, #0x7700 + str r1, [r0, #NFCONF_OFFSET] + + ldr r1, [r0, #NFCONT_OFFSET] + orr r1, r1, #0x07 + str r1, [r0, #NFCONT_OFFSET] + + mov pc, lr +#endif + +#ifdef CONFIG_ENABLE_MMU +/* + * MMU Table for SMDK6400 + */ + + /* form a first-level section entry */ +.macro FL_SECTION_ENTRY base,ap,d,c,b + .word (\base << 20) | (\ap << 10) | \ + (\d << 5) | (1<<4) | (\c << 3) | (\b << 2) | (1<<1) +.endm + +.section .mmudata, "a" + .align 14 + /* the following alignment creates the mmu table at address 0x4000. */ + .globl mmu_table +mmu_table: + .set __base, 0 + /* 1:1 mapping for debugging */ + .rept 0xA00 + FL_SECTION_ENTRY __base, 3, 0, 0, 0 + .set __base, __base + 1 + .endr + + /* access is not allowed. */ + .rept 0xC00 - 0xA00 + .word 0x00000000 + .endr + + /* 128MB for SDRAM 0xC0000000 -> 0x50000000 */ + .set __base, 0x500 + .rept 0xC80 - 0xC00 + FL_SECTION_ENTRY __base, 3, 0, 1, 1 + .set __base, __base + 1 + .endr + + /* access is not allowed. */ + .rept 0x1000 - 0xc80 + .word 0x00000000 + .endr +#endif diff --git a/board/samsung/smdk6400/smdk6400.c b/board/samsung/smdk6400/smdk6400.c new file mode 100644 index 00000000000..77fd2c8a219 --- /dev/null +++ b/board/samsung/smdk6400/smdk6400.c @@ -0,0 +1,130 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * (C) Copyright 2002 + * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <s3c6400.h> + +/* ------------------------------------------------------------------------- */ +#define CS8900_Tacs 0x0 /* 0clk address set-up */ +#define CS8900_Tcos 0x4 /* 4clk chip selection set-up */ +#define CS8900_Tacc 0xE /* 14clk access cycle */ +#define CS8900_Tcoh 0x1 /* 1clk chip selection hold */ +#define CS8900_Tah 0x4 /* 4clk address holding time */ +#define CS8900_Tacp 0x6 /* 6clk page mode access cycle */ +#define CS8900_PMC 0x0 /* normal(1data)page mode configuration */ + +static inline void delay(unsigned long loops) +{ + __asm__ volatile ("1:\n" "subs %0, %1, #1\n" + "bne 1b" + : "=r" (loops) : "0" (loops)); +} + +/* + * Miscellaneous platform dependent initialisations + */ + +static void cs8900_pre_init(void) +{ + SROM_BW_REG &= ~(0xf << 4); + SROM_BW_REG |= (1 << 7) | (1 << 6) | (1 << 4); + SROM_BC1_REG = ((CS8900_Tacs << 28) + (CS8900_Tcos << 24) + + (CS8900_Tacc << 16) + (CS8900_Tcoh << 12) + + (CS8900_Tah << 8) + (CS8900_Tacp << 4) + CS8900_PMC); +} + +int board_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + cs8900_pre_init(); + + /* NOR-flash in SROM0 */ + + /* Enable WAIT */ + SROM_BW_REG |= 4 | 8 | 1; + + gd->bd->bi_arch_number = MACH_TYPE; + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + + return 0; +} + +int dram_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +#ifdef CONFIG_DISPLAY_BOARDINFO +int checkboard(void) +{ + printf("Board: SMDK6400\n"); + return 0; +} +#endif + +#ifdef CONFIG_ENABLE_MMU +ulong virt_to_phy_smdk6400(ulong addr) +{ + if ((0xc0000000 <= addr) && (addr < 0xc8000000)) + return addr - 0xc0000000 + 0x50000000; + else + printf("do not support this address : %08lx\n", addr); + + return addr; +} +#endif + +#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY) +#include <linux/mtd/nand.h> +extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; +void nand_init(void) +{ + nand_probe(CFG_NAND_BASE); + if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) + print_size(nand_dev_desc[0].totlen, "\n"); +} +#endif + +ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t *info) +{ + if (banknum == 0) { /* non-CFI boot flash */ + info->portwidth = FLASH_CFI_16BIT; + info->chipwidth = FLASH_CFI_BY16; + info->interface = FLASH_CFI_X16; + return 1; + } else + return 0; +} diff --git a/board/integratorcp/memsetup.S b/board/samsung/smdk6400/u-boot-nand.lds index da43cb6a71b..132ab21ff9b 100644 --- a/board/integratorcp/memsetup.S +++ b/board/samsung/smdk6400/u-boot-nand.lds @@ -1,5 +1,9 @@ /* - * Memory setup for integratorAP + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> * * See file CREDITS for list of people who contributed to this * project. @@ -19,11 +23,40 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ -/* - * Memory setup - * - the reset defaults are assumed sufficient - */ -.globl memsetup -memsetup: - mov pc,lr +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm1176/start.o (.text) + cpu/arm1176/s3c64xx/cpu_init.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + .mmudata : { *(.mmudata) } + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} |