aboutsummaryrefslogtreecommitdiff
path: root/configs/chromebook_speedy_defconfig
diff options
context:
space:
mode:
Diffstat (limited to 'configs/chromebook_speedy_defconfig')
-rw-r--r--configs/chromebook_speedy_defconfig6
1 files changed, 3 insertions, 3 deletions
diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
index d5aaee9dde1..13c076188d4 100644
--- a/configs/chromebook_speedy_defconfig
+++ b/configs/chromebook_speedy_defconfig
@@ -5,12 +5,15 @@ CONFIG_SYS_ARCH_TIMER=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_TEXT_BASE=0x00100000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy"
CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC is not set
CONFIG_TARGET_CHROMEBOOK_SPEEDY=y
CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_SPL_STACK=0xff718000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -18,8 +21,6 @@ CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DEBUG_UART=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_SYS_MONITOR_LEN=614400
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
@@ -31,7 +32,6 @@ CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK=0xff718000
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set