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path: root/drivers/pci/pci-uclass.c
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Diffstat (limited to 'drivers/pci/pci-uclass.c')
-rw-r--r--drivers/pci/pci-uclass.c76
1 files changed, 76 insertions, 0 deletions
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 6262f352c99..b79927e453b 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -210,6 +210,17 @@ int pci_write_config(pci_dev_t bdf, int offset, unsigned long value,
return pci_bus_write_config(bus, bdf, offset, value, size);
}
+int dm_pci_write_config(struct udevice *dev, int offset, unsigned long value,
+ enum pci_size_t size)
+{
+ struct udevice *bus;
+
+ for (bus = dev; device_get_uclass_id(bus->parent) == UCLASS_PCI;)
+ bus = bus->parent;
+ return pci_bus_write_config(bus, pci_get_bdf(dev), offset, value, size);
+}
+
+
int pci_write_config32(pci_dev_t bdf, int offset, u32 value)
{
return pci_write_config(bdf, offset, value, PCI_SIZE_32);
@@ -225,6 +236,21 @@ int pci_write_config8(pci_dev_t bdf, int offset, u8 value)
return pci_write_config(bdf, offset, value, PCI_SIZE_8);
}
+int dm_pci_write_config8(struct udevice *dev, int offset, u8 value)
+{
+ return dm_pci_write_config(dev, offset, value, PCI_SIZE_8);
+}
+
+int dm_pci_write_config16(struct udevice *dev, int offset, u16 value)
+{
+ return dm_pci_write_config(dev, offset, value, PCI_SIZE_16);
+}
+
+int dm_pci_write_config32(struct udevice *dev, int offset, u32 value)
+{
+ return dm_pci_write_config(dev, offset, value, PCI_SIZE_32);
+}
+
int pci_bus_read_config(struct udevice *bus, pci_dev_t bdf, int offset,
unsigned long *valuep, enum pci_size_t size)
{
@@ -249,6 +275,17 @@ int pci_read_config(pci_dev_t bdf, int offset, unsigned long *valuep,
return pci_bus_read_config(bus, bdf, offset, valuep, size);
}
+int dm_pci_read_config(struct udevice *dev, int offset, unsigned long *valuep,
+ enum pci_size_t size)
+{
+ struct udevice *bus;
+
+ for (bus = dev; device_get_uclass_id(bus->parent) == UCLASS_PCI;)
+ bus = bus->parent;
+ return pci_bus_read_config(bus, pci_get_bdf(dev), offset, valuep,
+ size);
+}
+
int pci_read_config32(pci_dev_t bdf, int offset, u32 *valuep)
{
unsigned long value;
@@ -288,6 +325,45 @@ int pci_read_config8(pci_dev_t bdf, int offset, u8 *valuep)
return 0;
}
+int dm_pci_read_config8(struct udevice *dev, int offset, u8 *valuep)
+{
+ unsigned long value;
+ int ret;
+
+ ret = dm_pci_read_config(dev, offset, &value, PCI_SIZE_8);
+ if (ret)
+ return ret;
+ *valuep = value;
+
+ return 0;
+}
+
+int dm_pci_read_config16(struct udevice *dev, int offset, u16 *valuep)
+{
+ unsigned long value;
+ int ret;
+
+ ret = dm_pci_read_config(dev, offset, &value, PCI_SIZE_16);
+ if (ret)
+ return ret;
+ *valuep = value;
+
+ return 0;
+}
+
+int dm_pci_read_config32(struct udevice *dev, int offset, u32 *valuep)
+{
+ unsigned long value;
+ int ret;
+
+ ret = dm_pci_read_config(dev, offset, &value, PCI_SIZE_32);
+ if (ret)
+ return ret;
+ *valuep = value;
+
+ return 0;
+}
+
int pci_auto_config_devices(struct udevice *bus)
{
struct pci_controller *hose = bus->uclass_priv;