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-rw-r--r--drivers/phy/marvell/comphy_a3700.c9
-rw-r--r--drivers/phy/marvell/comphy_a3700.h1
2 files changed, 8 insertions, 2 deletions
diff --git a/drivers/phy/marvell/comphy_a3700.c b/drivers/phy/marvell/comphy_a3700.c
index bf68f5d6bea..50167a69afc 100644
--- a/drivers/phy/marvell/comphy_a3700.c
+++ b/drivers/phy/marvell/comphy_a3700.c
@@ -697,13 +697,15 @@ static void comphy_sgmii_phy_init(u32 lane, u32 speed)
static int comphy_sgmii_power_up(u32 lane, u32 speed, u32 invert)
{
int ret;
+ u32 saved_selector;
debug_enter();
/*
* 1. Configure PHY to SATA/SAS mode by setting pin PIN_PIPE_SEL=0
*/
- reg_set(COMPHY_SEL_ADDR, 0, rf_compy_select(lane));
+ saved_selector = readl(COMPHY_SEL_ADDR);
+ reg_set(COMPHY_SEL_ADDR, 0, 0xFFFFFFFF);
/*
* 2. Reset PHY by setting PHY input port PIN_RESET=1.
@@ -874,6 +876,11 @@ static int comphy_sgmii_power_up(u32 lane, u32 speed, u32 invert)
if (!ret)
printf("Failed to init RX of SGMII PHY %d\n", lane);
+ /*
+ * Restore saved selector.
+ */
+ reg_set(COMPHY_SEL_ADDR, saved_selector, 0xFFFFFFFF);
+
debug_exit();
return ret;
diff --git a/drivers/phy/marvell/comphy_a3700.h b/drivers/phy/marvell/comphy_a3700.h
index 0f0138dc977..a14767d809b 100644
--- a/drivers/phy/marvell/comphy_a3700.h
+++ b/drivers/phy/marvell/comphy_a3700.h
@@ -22,7 +22,6 @@
* COMPHY SB definitions
*/
#define COMPHY_SEL_ADDR MVEBU_REG(0x0183FC)
-#define rf_compy_select(lane) (0x1 << (((lane) == 1) ? 4 : 0))
#define COMPHY_PHY_CFG1_ADDR(lane) MVEBU_REG(0x018300 + (1 - lane) * 0x28)
#define rb_pin_pu_iveref BIT(1)