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-rw-r--r--drivers/clk/Kconfig10
-rw-r--r--drivers/clk/renesas/rzg2l-cpg.c6
-rw-r--r--drivers/clk/stm32/clk-stm32-core.h22
-rw-r--r--drivers/crypto/Kconfig8
-rw-r--r--drivers/ddr/imx/imx8ulp/Kconfig2
-rw-r--r--drivers/led/led_lp5562.c4
-rw-r--r--drivers/mtd/nand/raw/nand_ids.c2
-rw-r--r--drivers/mtd/spi/Kconfig2
-rw-r--r--drivers/rng/stm32_rng.c6
-rw-r--r--drivers/soc/ti/k3-navss-ringacc.c2
-rw-r--r--drivers/thermal/thermal_sandbox.c2
-rw-r--r--drivers/video/renesas-r61307.c2
-rw-r--r--drivers/video/renesas-r69328.c2
-rw-r--r--drivers/xen/pvblock.c2
14 files changed, 36 insertions, 36 deletions
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 017dd260a54..bda6873be33 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -57,27 +57,27 @@ config CLK_BOSTON
Enable this to support the clocks
config SPL_CLK_CCF
- bool "SPL Common Clock Framework [CCF] support "
+ bool "SPL Common Clock Framework [CCF] support"
depends on SPL
help
Enable this option if you want to (re-)use the Linux kernel's Common
Clock Framework [CCF] code in U-Boot's SPL.
config SPL_CLK_COMPOSITE_CCF
- bool "SPL Common Clock Framework [CCF] composite clk support "
+ bool "SPL Common Clock Framework [CCF] composite clk support"
depends on SPL_CLK_CCF
help
Enable this option if you want to (re-)use the Linux kernel's Common
Clock Framework [CCF] composite code in U-Boot's SPL.
config CLK_CCF
- bool "Common Clock Framework [CCF] support "
+ bool "Common Clock Framework [CCF] support"
help
Enable this option if you want to (re-)use the Linux kernel's Common
Clock Framework [CCF] code in U-Boot's clock driver.
config CLK_COMPOSITE_CCF
- bool "Common Clock Framework [CCF] composite clk support "
+ bool "Common Clock Framework [CCF] composite clk support"
depends on CLK_CCF
help
Enable this option if you want to (re-)use the Linux kernel's Common
@@ -164,7 +164,7 @@ config CLK_OCTEON
Enable this to support the clocks on Octeon MIPS platforms.
config SANDBOX_CLK_CCF
- bool "Sandbox Common Clock Framework [CCF] support "
+ bool "Sandbox Common Clock Framework [CCF] support"
depends on SANDBOX
select CLK_CCF
help
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index dba009997a8..c8735d869cf 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -313,9 +313,9 @@ static ulong rzg2l_sdhi_clk_set_rate(struct udevice *dev, const struct cpg_core_
/*
* As per the HW manual, we should not directly switch from 533 MHz to
- * 400 MHz and vice versa. To change the setting from 2’b01 (533 MHz)
- * to 2’b10 (400 MHz) or vice versa, Switch to 2’b11 (266 MHz) first,
- * and then switch to the target setting (2’b01 (533 MHz) or 2’b10
+ * 400 MHz and vice versa. To change the setting from 2'b01 (533 MHz)
+ * to 2'b10 (400 MHz) or vice versa, Switch to 2'b11 (266 MHz) first,
+ * and then switch to the target setting (2'b01 (533 MHz) or 2'b10
* (400 MHz)).
*/
if (new_sel != SEL_SDHI_266MHz && prev_sel != SEL_SDHI_266MHz) {
diff --git a/drivers/clk/stm32/clk-stm32-core.h b/drivers/clk/stm32/clk-stm32-core.h
index 53c2b467ab8..f9ef0702005 100644
--- a/drivers/clk/stm32/clk-stm32-core.h
+++ b/drivers/clk/stm32/clk-stm32-core.h
@@ -178,7 +178,7 @@ int stm32_rcc_init(struct udevice *dev,
* ------------------------------ ----------
* Each peripheral requires a bus interface clock, named ckg_bus_perx
- * (for peripheral ‘x’).
+ * (for peripheral `x').
* Some peripherals (SAI, UART...) need also a dedicated clock for their
* communication interface, this clock is generally asynchronous with respect to
* the bus interface clock, and is named kernel clock (ckg_ker_perx).
@@ -188,16 +188,16 @@ int stm32_rcc_init(struct udevice *dev,
* the bus or the Kernel was enable.
*
* Example:
- * 1) enable the bus clock
- * --> bus_clk ref_counting = 1, gate_ref_count = 1
- * 2) enable the kernel clock
- * --> perx_ker_ck ref_counting = 1, gate_ref_count = 2
- * 3) disable kernel clock
- *  ---> perx_ker_ck ref_counting = 0, gate_ref_count = 1
- *  ==> then i will not gate because gate_ref_count > 0
- * 4) disable bus clock
- * --> bus_clk ref_counting = 0, gate_ref_count = 0
- * ==> then i can gate (write in the register) because
+ * 1) enable the bus clock
+ * --> bus_clk ref_counting = 1, gate_ref_count = 1
+ * 2) enable the kernel clock
+ * --> perx_ker_ck ref_counting = 1, gate_ref_count = 2
+ * 3) disable kernel clock
+ * ---> perx_ker_ck ref_counting = 0, gate_ref_count = 1
+ * ==> then i will not gate because gate_ref_count > 0
+ * 4) disable bus clock
+ * --> bus_clk ref_counting = 0, gate_ref_count = 0
+ * ==> then i can gate (write in the register) because
* gate_ref_count = 0
*/
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 12ef84ca05c..8b49997030b 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -1,11 +1,11 @@
menu "Hardware crypto devices"
-source drivers/crypto/hash/Kconfig
+source "drivers/crypto/hash/Kconfig"
-source drivers/crypto/fsl/Kconfig
+source "drivers/crypto/fsl/Kconfig"
-source drivers/crypto/aspeed/Kconfig
+source "drivers/crypto/aspeed/Kconfig"
-source drivers/crypto/nuvoton/Kconfig
+source "drivers/crypto/nuvoton/Kconfig"
endmenu
diff --git a/drivers/ddr/imx/imx8ulp/Kconfig b/drivers/ddr/imx/imx8ulp/Kconfig
index 5448c33838c..005f581f4ba 100644
--- a/drivers/ddr/imx/imx8ulp/Kconfig
+++ b/drivers/ddr/imx/imx8ulp/Kconfig
@@ -5,7 +5,7 @@ config IMX8ULP_DRAM
bool "imx8m dram"
config IMX8ULP_DRAM_PHY_PLL_BYPASS
- bool "Enable the DDR PHY PLL bypass mode, so PHY clock is from DDR_CLK "
+ bool "Enable the DDR PHY PLL bypass mode, so PHY clock is from DDR_CLK"
depends on IMX8ULP_DRAM
config SAVED_DRAM_TIMING_BASE
diff --git a/drivers/led/led_lp5562.c b/drivers/led/led_lp5562.c
index 431d7e10ab7..0c5f9bc4300 100644
--- a/drivers/led/led_lp5562.c
+++ b/drivers/led/led_lp5562.c
@@ -125,9 +125,9 @@ static int lp5562_led_reg_update(struct udevice *dev, int regnum,
/*
* Data sheet says "Delay between consecutive I2C writes to
- * ENABLE register (00h) need to be longer than 488 μs
+ * ENABLE register (00h) need to be longer than 488 us
* (typical)." and "Delay between consecutive I2C writes to
- * OP_MODE register need to be longer than 153 μs (typ)."
+ * OP_MODE register need to be longer than 153 us (typ)."
*
* The linux driver does usleep_range(500, 600) and
* usleep_range(200, 300), respectively.
diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c
index 22ea5e2f907..be60d6d9d99 100644
--- a/drivers/mtd/nand/raw/nand_ids.c
+++ b/drivers/mtd/nand/raw/nand_ids.c
@@ -62,7 +62,7 @@ struct nand_flash_dev nand_flash_ids[] = {
{ .id = {0xad, 0xde, 0x94, 0xda, 0x74, 0xc4} },
SZ_8K, SZ_8K, SZ_2M, NAND_NEED_SCRAMBLING, 6, 640,
NAND_ECC_INFO(40, SZ_1K), 4 },
- {"H27QCG8T2E5R‐BCF 64G 3.3V 8-bit",
+ {"H27QCG8T2E5R-BCF 64G 3.3V 8-bit",
{ .id = {0xad, 0xde, 0x14, 0xa7, 0x42, 0x4a} },
SZ_16K, SZ_8K, SZ_4M, NAND_NEED_SCRAMBLING, 6, 1664,
NAND_ECC_INFO(56, SZ_1K), 1 },
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index d068b7860e1..bedc4e970e4 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -246,7 +246,7 @@ config SPI_FLASH_USE_4K_SECTORS
to erasing whole blocks (32/64 KiB).
Changing a small part of the flash's contents is usually faster with
small sectors. On the other hand erasing should be faster when using
- 64 KiB block instead of 16 × 4 KiB sectors.
+ 64 KiB block instead of 16 x 4 KiB sectors.
Please note that some tools/drivers/filesystems may not work with
4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
diff --git a/drivers/rng/stm32_rng.c b/drivers/rng/stm32_rng.c
index 61d5ed61582..44e8a460752 100644
--- a/drivers/rng/stm32_rng.c
+++ b/drivers/rng/stm32_rng.c
@@ -74,7 +74,7 @@ struct stm32_rng_plat {
* Extracts from the STM32 RNG specification when RNG supports CONDRST.
*
* When a noise source (or seed) error occurs, the RNG stops generating
- * random numbers and sets to “1” both SEIS and SECS bits to indicate
+ * random numbers and sets to "1" both SEIS and SECS bits to indicate
* that a seed error occurred. (...)
*
* 1. Software reset by writing CONDRST at 1 and at 0 (see bitfield
@@ -127,12 +127,12 @@ static int stm32_rng_conceal_seed_error_cond_reset(struct stm32_rng_plat *pdata)
* Extracts from the STM32 RNG specification, when CONDRST is not supported
*
* When a noise source (or seed) error occurs, the RNG stops generating
- * random numbers and sets to “1” both SEIS and SECS bits to indicate
+ * random numbers and sets to "1" both SEIS and SECS bits to indicate
* that a seed error occurred. (...)
*
* The following sequence shall be used to fully recover from a seed
* error after the RNG initialization:
- * 1. Clear the SEIS bit by writing it to “0”.
+ * 1. Clear the SEIS bit by writing it to "0".
* 2. Read out 12 words from the RNG_DR register, and discard each of
* them in order to clean the pipeline.
* 3. Confirm that SEIS is still cleared. Random number generation is
diff --git a/drivers/soc/ti/k3-navss-ringacc.c b/drivers/soc/ti/k3-navss-ringacc.c
index 7a2fbb0db6e..ed39ff2fa4c 100644
--- a/drivers/soc/ti/k3-navss-ringacc.c
+++ b/drivers/soc/ti/k3-navss-ringacc.c
@@ -418,7 +418,7 @@ void k3_nav_ringacc_ring_reset_dma(struct k3_nav_ring *ring, u32 occ)
k3_ringacc_ring_reconfig_qmode_sci(
ring, K3_NAV_RINGACC_RING_MODE_RING);
/*
- * 4. Ring the doorbell 2**22 – ringOcc times.
+ * 4. Ring the doorbell 2**22 - ringOcc times.
* This will wrap the internal UDMAP ring state occupancy
* counter (which is 21-bits wide) to 0.
*/
diff --git a/drivers/thermal/thermal_sandbox.c b/drivers/thermal/thermal_sandbox.c
index acc364feb03..7dc0d108b8c 100644
--- a/drivers/thermal/thermal_sandbox.c
+++ b/drivers/thermal/thermal_sandbox.c
@@ -12,7 +12,7 @@
int sandbox_thermal_get_temp(struct udevice *dev, int *temp)
{
- /* Simply return 100°C */
+ /* Simply return 100 deg C */
*temp = 100;
return 0;
diff --git a/drivers/video/renesas-r61307.c b/drivers/video/renesas-r61307.c
index 1eccaf6b1be..3f5859055c9 100644
--- a/drivers/video/renesas-r61307.c
+++ b/drivers/video/renesas-r61307.c
@@ -19,7 +19,7 @@
#include <power/regulator.h>
/*
- * The datasheet is not publicly available, all values are
+ * The datasheet is not publicly available, all values are
* taken from the downstream. If you have access to datasheets,
* corrections are welcome.
*/
diff --git a/drivers/video/renesas-r69328.c b/drivers/video/renesas-r69328.c
index ecf89ec021b..082f5bc3d0a 100644
--- a/drivers/video/renesas-r69328.c
+++ b/drivers/video/renesas-r69328.c
@@ -19,7 +19,7 @@
#include <power/regulator.h>
/*
- * The datasheet is not publicly available, all values are
+ * The datasheet is not publicly available, all values are
* taken from the downstream. If you have access to datasheets,
* corrections are welcome.
*/
diff --git a/drivers/xen/pvblock.c b/drivers/xen/pvblock.c
index 1df04e239ad..9fc51d203e5 100644
--- a/drivers/xen/pvblock.c
+++ b/drivers/xen/pvblock.c
@@ -79,7 +79,7 @@ struct blkfront_plat {
};
/**
- * struct blkfront_aiocb - AIO сontrol block
+ * struct blkfront_aiocb - AIO control block
* @aio_dev: Blockfront device
* @aio_buf: Memory buffer, which must be sector-aligned for
* @aio_dev sector