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Diffstat (limited to 'dts/upstream/Bindings/pwm/marvell,pxa-pwm.yaml')
-rw-r--r-- | dts/upstream/Bindings/pwm/marvell,pxa-pwm.yaml | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/dts/upstream/Bindings/pwm/marvell,pxa-pwm.yaml b/dts/upstream/Bindings/pwm/marvell,pxa-pwm.yaml new file mode 100644 index 00000000000..ba6325575ea --- /dev/null +++ b/dts/upstream/Bindings/pwm/marvell,pxa-pwm.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/marvell,pxa-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell PXA PWM + +maintainers: + - Duje Mihanović <duje.mihanovic@skole.hr> + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + enum: + - marvell,pxa250-pwm + - marvell,pxa270-pwm + - marvell,pxa168-pwm + - marvell,pxa910-pwm + + reg: + # Length should be 0x10 + maxItems: 1 + + "#pwm-cells": + # Used for specifying the period length in nanoseconds + const: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - "#pwm-cells" + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/pxa-clock.h> + + pwm0: pwm@40b00000 { + compatible = "marvell,pxa250-pwm"; + reg = <0x40b00000 0x10>; + #pwm-cells = <1>; + clocks = <&clks CLK_PWM0>; + }; |