aboutsummaryrefslogtreecommitdiff
path: root/dts/upstream/src/arm64/renesas/r8a774a1-beacon-rzg2m-kit.dts
diff options
context:
space:
mode:
Diffstat (limited to 'dts/upstream/src/arm64/renesas/r8a774a1-beacon-rzg2m-kit.dts')
-rw-r--r--dts/upstream/src/arm64/renesas/r8a774a1-beacon-rzg2m-kit.dts60
1 files changed, 60 insertions, 0 deletions
diff --git a/dts/upstream/src/arm64/renesas/r8a774a1-beacon-rzg2m-kit.dts b/dts/upstream/src/arm64/renesas/r8a774a1-beacon-rzg2m-kit.dts
new file mode 100644
index 00000000000..24da6ee6ecc
--- /dev/null
+++ b/dts/upstream/src/arm64/renesas/r8a774a1-beacon-rzg2m-kit.dts
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2020, Compass Electronics Group, LLC
+ */
+
+/dts-v1/;
+
+#include "r8a774a1.dtsi"
+#include "beacon-renesom-som.dtsi"
+#include "beacon-renesom-baseboard.dtsi"
+
+/ {
+ model = "Beacon EmbeddedWorks RZ/G2M Development Kit";
+ compatible = "beacon,beacon-rzg2m", "renesas,r8a774a1";
+
+ aliases {
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ i2c6 = &i2c6;
+ i2c7 = &iic_pmic;
+ serial0 = &scif2;
+ serial1 = &hscif0;
+ serial2 = &hscif1;
+ serial3 = &scif0;
+ serial4 = &hscif2;
+ serial5 = &scif5;
+ ethernet0 = &avb;
+ mmc0 = &sdhi3;
+ mmc1 = &sdhi0;
+ mmc2 = &sdhi2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@600000000 {
+ device_type = "memory";
+ reg = <0x6 0x00000000 0x0 0x80000000>;
+ };
+};
+
+&du {
+ pinctrl-0 = <&du_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>,
+ <&versaclock5 1>,
+ <&x302_clk>,
+ <&versaclock5 2>;
+ clock-names = "du.0", "du.1", "du.2",
+ "dclkin.0", "dclkin.1", "dclkin.2";
+};