diff options
Diffstat (limited to 'dts/upstream/src/arm64/renesas/r8a774e1-hihope-rzg2h.dts')
| -rw-r--r-- | dts/upstream/src/arm64/renesas/r8a774e1-hihope-rzg2h.dts | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/dts/upstream/src/arm64/renesas/r8a774e1-hihope-rzg2h.dts b/dts/upstream/src/arm64/renesas/r8a774e1-hihope-rzg2h.dts new file mode 100644 index 00000000000..9525d5ed6fc --- /dev/null +++ b/dts/upstream/src/arm64/renesas/r8a774e1-hihope-rzg2h.dts @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the HiHope RZ/G2H main board + * + * Copyright (C) 2020 Renesas Electronics Corp. + */ + +/dts-v1/; +#include "r8a774e1.dtsi" +#include "hihope-rev4.dtsi" + +/ { + model = "HopeRun HiHope RZ/G2H main board based on r8a774e1"; + compatible = "hoperun,hihope-rzg2h", "renesas,r8a774e1"; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x78000000>; + }; + + memory@500000000 { + device_type = "memory"; + reg = <0x5 0x00000000 0x0 0x80000000>; + }; +}; + +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 721>, + <&versaclock5 1>, + <&x302_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.3", + "dclkin.0", "dclkin.1", "dclkin.3"; +}; + +&sdhi3 { + mmc-hs400-1_8v; +}; |