diff options
Diffstat (limited to 'dts/upstream/src/arm64/renesas/r8a77960-ulcb.dts')
| -rw-r--r-- | dts/upstream/src/arm64/renesas/r8a77960-ulcb.dts | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/dts/upstream/src/arm64/renesas/r8a77960-ulcb.dts b/dts/upstream/src/arm64/renesas/r8a77960-ulcb.dts new file mode 100644 index 00000000000..4bfeb1df048 --- /dev/null +++ b/dts/upstream/src/arm64/renesas/r8a77960-ulcb.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board with R-Car M3-W + * + * Copyright (C) 2016 Renesas Electronics Corp. + * Copyright (C) 2016 Cogent Embedded, Inc. + */ + +/dts-v1/; +#include "r8a77960.dtsi" +#include "ulcb.dtsi" + +/ { + model = "Renesas M3ULCB board based on r8a77960"; + compatible = "renesas,m3ulcb", "renesas,r8a7796"; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; + }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x0 0x40000000>; + }; +}; + +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, + <&versaclock5 1>, + <&versaclock5 3>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.2", + "dclkin.0", "dclkin.1", "dclkin.2"; +}; |