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diff --git a/dts/upstream/src/arm64/renesas/rz-smarc-cru-csi-ov5645.dtsi b/dts/upstream/src/arm64/renesas/rz-smarc-cru-csi-ov5645.dtsi
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+++ b/dts/upstream/src/arm64/renesas/rz-smarc-cru-csi-ov5645.dtsi
@@ -0,0 +1,80 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Common Device Tree for the RZ/G2L SMARC EVK (and alike EVKs) with
+ * OV5645 camera connected to CSI and CRU enabled.
+ *
+ * Copyright (C) 2023 Renesas Electronics Corp.
+ */
+
+&{/} {
+ ov5645_vdddo_1v8: 1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "camera_vdddo";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ov5645_vdda_2v8: 2p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "camera_vdda";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ };
+
+ ov5645_vddd_1v5: 1p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "camera_vddd";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ };
+
+ ov5645_fixed_clk: osc25250-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ };
+};
+
+&cru {
+ status = "okay";
+};
+
+&csi2 {
+ status = "okay";
+
+ ports {
+ port@0 {
+ csi2_in: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ remote-endpoint = <&ov5645_ep>;
+ };
+ };
+ };
+};
+
+&OV5645_PARENT_I2C {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ov5645: camera@3c {
+ compatible = "ovti,ov5645";
+ reg = <0x3c>;
+ clocks = <&ov5645_fixed_clk>;
+ clock-frequency = <24000000>;
+ vdddo-supply = <&ov5645_vdddo_1v8>;
+ vdda-supply = <&ov5645_vdda_2v8>;
+ vddd-supply = <&ov5645_vddd_1v5>;
+
+ port {
+ ov5645_ep: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ remote-endpoint = <&csi2_in>;
+ };
+ };
+ };
+};