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-rw-r--r--include/configs/xilinx_zynqmp.h6
-rw-r--r--include/configs/xilinx_zynqmp_ep.h9
-rw-r--r--include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h29
-rw-r--r--include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h26
-rw-r--r--include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h27
-rw-r--r--include/configs/xilinx_zynqmp_zcu102.h60
-rw-r--r--include/configs/zynq-common.h17
-rw-r--r--include/configs/zynq_microzed.h2
8 files changed, 161 insertions, 15 deletions
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 8cea61080d4..f7b4643708f 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -17,7 +17,6 @@
#define CONFIG_SYS_NO_FLASH
-
/* Generic Interrupt Controller Definitions */
#define CONFIG_GICV2
#define GICD_BASE 0xF9010000
@@ -44,8 +43,6 @@
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
-/* Flat Device Tree Definitions */
-
/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
#if !defined(COUNTER_FREQUENCY)
# define COUNTER_FREQUENCY 100000000
@@ -165,8 +162,7 @@
"kernel_addr=0x80000\0" \
"fdt_addr=0x7000000\0" \
"fdt_high=0x10000000\0" \
- "kernel_size=0x2000000\0" \
- "fdt_size=0x80000\0" \
+ CONFIG_KERNEL_FDT_OFST_SIZE \
"sdbootdev=0\0"\
"sdboot=mmc dev $sdbootdev && mmcinfo && load mmc $sdbootdev:$partid $fdt_addr system.dtb && " \
"load mmc $sdbootdev:$partid $kernel_addr Image && " \
diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h
index aa58b62531d..95063557137 100644
--- a/include/configs/xilinx_zynqmp_ep.h
+++ b/include/configs/xilinx_zynqmp_ep.h
@@ -15,8 +15,6 @@
#define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9)
-#define CONFIG_ZYNQ_I2C0
-#define CONFIG_SYS_I2C_ZYNQ
#define CONFIG_ZYNQ_EEPROM
#define CONFIG_AHCI
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
@@ -24,6 +22,13 @@
#define COUNTER_FREQUENCY 4000000
+#define CONFIG_KERNEL_FDT_OFST_SIZE \
+ "kernel_offset=0x400000\0" \
+ "fdt_offset=0x2400000\0" \
+ "kernel_size=0x2000000\0" \
+ "fdt_size=0x80000\0" \
+ "board=ep108\0"
+
#include <configs/xilinx_zynqmp.h>
#endif /* __CONFIG_ZYNQMP_EP_H */
diff --git a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h
new file mode 100644
index 00000000000..3c0ba883dbb
--- /dev/null
+++ b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h
@@ -0,0 +1,29 @@
+/*
+ * Configuration for Xilinx ZynqMP zc1751 XM015 DC1
+ *
+ * (C) Copyright 2015 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H
+#define __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H
+
+#define CONFIG_ZYNQ_SDHCI0
+#define CONFIG_ZYNQ_SDHCI1
+#define CONFIG_AHCI
+#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
+
+#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm015 dc1"
+
+#define CONFIG_KERNEL_FDT_OFST_SIZE \
+ "kernel_offset=0x400000\0" \
+ "fdt_offset=0x2400000\0" \
+ "kernel_size=0x2000000\0" \
+ "fdt_size=0x80000\0" \
+ "board=zc1751-dc1\0"
+
+#include <configs/xilinx_zynqmp.h>
+
+#endif /* __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H */
diff --git a/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h b/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h
new file mode 100644
index 00000000000..83ea624c51c
--- /dev/null
+++ b/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h
@@ -0,0 +1,26 @@
+/*
+ * Configuration for Xilinx ZynqMP zc1751 XM016 DC2
+ *
+ * (C) Copyright 2015 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H
+#define __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H
+
+#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB1_XHCI_BASEADDR}
+
+#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm016 dc2"
+
+#define CONFIG_KERNEL_FDT_OFST_SIZE \
+ "kernel_offset=0x400000\0" \
+ "fdt_offset=0x2400000\0" \
+ "kernel_size=0x2000000\0" \
+ "fdt_size=0x80000\0" \
+ "board=zc1751-dc2\0"
+
+#include <configs/xilinx_zynqmp.h>
+
+#endif /* __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H */
diff --git a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h
new file mode 100644
index 00000000000..4f8f5c10536
--- /dev/null
+++ b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h
@@ -0,0 +1,27 @@
+/*
+ * Configuration for Xilinx ZynqMP zc1751 XM019 DC5
+ *
+ * (C) Copyright 2015 Xilinx, Inc.
+ * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H
+#define __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H
+
+#define CONFIG_ZYNQ_SDHCI0
+
+#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm019 dc5"
+
+#define CONFIG_KERNEL_FDT_OFST_SIZE \
+ "kernel_offset=0x400000\0" \
+ "fdt_offset=0x2400000\0" \
+ "kernel_size=0x2000000\0" \
+ "fdt_size=0x80000\0" \
+ "board=zc1751-dc5\0"
+
+#include <configs/xilinx_zynqmp.h>
+
+#endif /* __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H */
diff --git a/include/configs/xilinx_zynqmp_zcu102.h b/include/configs/xilinx_zynqmp_zcu102.h
new file mode 100644
index 00000000000..30db2e45324
--- /dev/null
+++ b/include/configs/xilinx_zynqmp_zcu102.h
@@ -0,0 +1,60 @@
+/*
+ * Configuration for Xilinx ZynqMP zcu102
+ *
+ * (C) Copyright 2015 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_ZYNQMP_ZCU102_H
+#define __CONFIG_ZYNQMP_ZCU102_H
+
+#define CONFIG_ZYNQ_SDHCI1
+#define CONFIG_ZYNQ_I2C0
+#define CONFIG_ZYNQ_I2C1
+#define CONFIG_SYS_I2C_MAX_HOPS 1
+#define CONFIG_SYS_NUM_I2C_BUSES 18
+#define CONFIG_SYS_I2C_BUSES { \
+ {0, {I2C_NULL_HOP} }, \
+ {0, {{I2C_MUX_PCA9544, 0x75, 0} } }, \
+ {0, {{I2C_MUX_PCA9544, 0x75, 1} } }, \
+ {0, {{I2C_MUX_PCA9544, 0x75, 2} } }, \
+ {1, {I2C_NULL_HOP} }, \
+ {1, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
+ }
+
+#define CONFIG_SYS_I2C_ZYNQ
+#define CONFIG_PCA953X
+#define CONFIG_CMD_PCA953X
+#define CONFIG_CMD_PCA953X_INFO
+
+#define CONFIG_AHCI
+#define CONFIG_SATA_CEVA
+
+#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
+
+#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZCU102"
+
+#define CONFIG_KERNEL_FDT_OFST_SIZE \
+ "kernel_offset=0x180000\0" \
+ "fdt_offset=0x100000\0" \
+ "kernel_size=0x1e00000\0" \
+ "fdt_size=0x80000\0" \
+ "board=zcu102\0"
+
+#include <configs/xilinx_zynqmp.h>
+
+#endif /* __CONFIG_ZYNQMP_ZCU102_H */
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index d8e3fa4e5a4..49d9fd059f3 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -39,8 +39,6 @@
#define CONFIG_ARM_DCC
#define CONFIG_ZYNQ_SERIAL
-#define CONFIG_ZYNQ_GPIO
-
/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM)
# define CONFIG_MII
@@ -114,6 +112,7 @@
# define CONFIG_USB_CABLE_CHECK
# define CONFIG_CMD_DFU
# define CONFIG_CMD_THOR_DOWNLOAD
+# define CONFIG_THOR_RESET_OFF
# define CONFIG_USB_FUNCTION_THOR
# define DFU_ALT_INFO_RAM \
"dfu_ram_info=" \
@@ -277,15 +276,17 @@
/* Physical Memory map */
#define CONFIG_SYS_TEXT_BASE 0x4000000
-#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE 0
+#ifndef CONFIG_NR_DRAM_BANKS
+# define CONFIG_NR_DRAM_BANKS 1
+#endif
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
+#define CONFIG_SYS_MEMTEST_START 0
+#define CONFIG_SYS_MEMTEST_END 0x1000
#define CONFIG_SYS_MALLOC_LEN 0x1400000
-#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
+
+#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
+#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
diff --git a/include/configs/zynq_microzed.h b/include/configs/zynq_microzed.h
index e66088da4f7..ec7bb1cef55 100644
--- a/include/configs/zynq_microzed.h
+++ b/include/configs/zynq_microzed.h
@@ -12,6 +12,8 @@
#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ZYNQ_USB
+
#include <configs/zynq-common.h>
#endif /* __CONFIG_ZYNQ_MICROZED_H */
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-11 05:00:40 +0000