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2019-03-03configs: fsl: move DDR specific defines to KconfigRajesh Bhagat
Moves below DDR specific defines to Kconfig: CONFIG_FSL_DDR_BIST CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE CONFIG_FSL_DDR_INTERACTIVE CONFIG_FSL_DDR_SYNC_REFRESH Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-03board: ls1043a: use default scan_dev_for_bootMian Yousaf Kaukab
Default environment variable is more complete. Also scans for efi binaries for example. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-03board: ls1043a: enable dhcp bootMian Yousaf Kaukab
dhcp boot is a useful feature and works out-of-the-box on these platforms. Enable it as a boot source. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-03board: ls1043a: enable EFI_LOADER_BOUNCE_BUFFERMian Yousaf Kaukab
EFI applications need bounce buffers to work properly on these platforms. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-03board: ls1046a: use default scan_dev_for_bootMian Yousaf Kaukab
Default environment variable is more complete. Also scans for efi binaries for example. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-03board: ls1046a: enable dhcp bootMian Yousaf Kaukab
dhcp boot is a useful feature and works out-of-the-box on these platforms. Enable it as a boot source. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-03board: ls1046a: enable EFI_LOADER_BOUNCE_BUFFERMian Yousaf Kaukab
EFI applications need bounce buffers to work properly on these platforms. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-03board: ls2080ardb: use default scan_dev_for_bootMian Yousaf Kaukab
Default environment variable is more complete. Also scans for efi binaries for example. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-03Revert "ls2080ardb: remove dhcp function from env as boot source"Mian Yousaf Kaukab
dhcp boot is a useful feature and works out-of-the-box for ls2088a platforms. Moreover, no solid reason is given for disabling it. Revert the patch to re-enable it. This reverts commit aea5cd75e63c20de4c00ce24a93eeee8542f923e. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-03board: ls1088ardb: use default scan_dev_for_bootMian Yousaf Kaukab
Default environment variable is more complete. Also scans for efi binaries for example. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-03Revert "ls1088a: remove dhcp function from u-boot env as boot source"Mian Yousaf Kaukab
dhcp boot is a useful feature and works out-of-the-box for ls1088a platforms. Moreover, no solid reason is given for disabling it. Revert the patch to re-enable it. This reverts commit 863e42e8b1f9e97d87919e20e34a7b98089f7522. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-03board: ls1088a: fix fsl-mc search pathMian Yousaf Kaukab
Path for fsl-mc node in kernel device-tree is /soc/fsl-mc whereas in u-boot it is /fsl-mc. Fix the incorrect search path to fix following error: fdt_fixup_board_enet: ERROR: fsl-mc node not found in device tree (error -1) Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-03board: ls1088a: fix dppa exit when using efi bootMian Yousaf Kaukab
Same issue for ls2080a was fixed by following patch: b7b8410a8f ls2080: Exit dpaa only right before exiting U-Boot Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-28Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- SoCFPGA cache/gpio fixes
2019-02-28Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- Gen2/Gen3 fixes for warnings and sdhi
2019-02-28Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
- Various Bananapi fixes
2019-02-28Merge branch '2019-02-29-master-imports'Tom Rini
- Assorted BSP fixes - Kbuild fix
2019-02-28spl: add debug print for early malloc usageSimon Goldschmidt
To find out how big the early malloc heap must be in SPL, add a debug print statement that dumps its usage before switching to relocated heap in spl_relocate_stack_gd() via CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-02-28kbuild: fix DTB .cmd source variableStephen Warren
*.dts are processed using a custom command, then the C pre-processor is run on them, then they are compiled using dtc. Thus, the dependency files generated by both cpp and dtc reference a temporary file name rather than the actual source file. While this information isn't used for any purpose by the build system, and hence this causes no functional issue, it does cause the dependency files to contain invalid and confusing data, which is unhelpful while debugging build problems. Fix this using sed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-02-28kbuild: make arch-dtbs target PHONYStephen Warren
Without this, the arch-dtbs target only gets evaluated when building U-Boot the first time, not when re-building (incrementally building) U-Boot. Thus incremental builds ignore changes to DTB files. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-02-28doc: binding: rename directory ram to memory-controllerPatrick Delaunay
Alignment with kernel directory name as it have already bindings for DDR controllers in the directory: Documentation/devicetree/bindings/memory-controller PS: the drivers using RAM u-class should be associated with this binding directory Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-02-28fs: fat: fix link error when building with DEBUG=1Heinrich Schuchardt
When compiling with DEBUG=1 an error fs/fat/fat_write.c:831: undefined reference to `__aeabi_ldivmod' occurred. We should use do_div() instead of the modulus operator. filesize and cur_pos cannot be negative. So let's use u64 to avoid warnings. Fixes: cb8af8af5ba0 ("fs: fat: support write with non-zero offset") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-02-28arm: pdu001: Fix order of include filesFelix Brack
Fix the order of include files according to U-Boot coding style. Signed-off-by: Felix Brack <fb@ltec.ch>
2019-02-28.gitignore: Ignore regenerated *.dtbo filesMichal Simek
*.dtbo are dt overlays files which should be also ignored as *.dtb. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-28ARM: cache: Fix incorrect bitwise operationMarek Vasut
The loop implemented in the code is supposed to check whether the PL310 operation register has any bit from the mask set. Currently, the code checks whether the PL310 operation register has any bit set AND whether the mask is non-zero, which is incorrect. Fix the conditional. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Tom Rini <trini@konsulko.com> Fixes: 93bc21930a1b ("armv7: add PL310 support to u-boot") Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
2019-02-28spi: omap3: fix set_wordlen() reading from incorrect address for CHCONFDavid Rivshin
_omap3_spi_set_wordlen() indexed the regs->channel[] array with the old wordlen (instead of the chipselect number) when reading the current CHCONF register value. This meant it read from the wrong memory location, modified that value, and then wrote it back to the correct CHCONF register. The end result is that most slave configuration settings would be lost, such as clock divisor, clock/chipselect polarities, etc. Fixes: 77b8d04854f4 ("spi: omap3: Convert to driver model") Signed-off-by: David Rivshin <drivshin@allworx.com>
2019-02-27Merge git://git.denx.de/u-boot-riscvTom Rini
- SiFive FU540 Support
2019-02-27riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrdAnup Patel
This patch enables CONFIG_SYS_BOOT_RAMDISK_HIGH for RISC-V because bootm will update initrd location in DTB only if CONFIG_SYS_BOOT_RAMDISK_HIGH is enabled. If we don't enable this option then bootm assumes DTB already has initrd details which is not the case most of the time. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-02-27doc: Add a readme guide for SiFive FU540Atish Patra
The readme guide describes the procedure to build, flash and boot Linux using U-Boot on HiFive Unleashed. It also explains the current state of U-boot support and future action items. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-02-27riscv: Add SiFive FU540 board supportAnup Patel
This patch adds SiFive FU540 board support. For now, only SiFive serial, SiFive PRCI, and Cadance MACB drivers are only enabled. The SiFive FU540 defconfig by default builds U-Boot for S-Mode because U-Boot on SiFive FU540 will run in S-Mode as payload of BBL or OpenSBI. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-27cpu: Bind timer driver for boot hartAtish Patra
Currently, timer driver is bound only for hart0. There is no mandatory requirement that hart0 should always come up. In fact, HiFive Unleashed SoC hart0 doesn't boot in S-mode because it only has M-mode. The timer driver should be bound for boot hart. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-27drivers: serial_sifive: Skip baudrate config if no input clockAtish Patra
It is possible that input clock is not available because clk device was not available and 'clock-frequency' DT property is also not available. In this case, instead of failing we should just skip baudrate config by returning zero. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2019-02-27drivers: serial_sifive: Fix baud rate calculationAtish Patra
Compute the baud rate multipler with more precision. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-02-27clk: Add fixed-factor clock driverAnup Patel
This patch adds fixed-factor clock driver which derives clock rate by dividing (div) and multiplying (mult) fixed factors to a parent clock. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-27clk: Add SiFive FU540 PRCI clock driverAnup Patel
Add driver code for the SiFive FU540 PRCI IP block. This IP block handles reset and clock control for the SiFive FU540 device and implements SoC-level clock tree controls and dividers. Based on code written by Wesley Terpstra <wesley@sifive.com> found in commit 999529edf517ed75b56659d456d221b2ee56bb60 of: https://github.com/riscv/riscv-linux Boot and PLL rate change were tested on a SiFive HiFive Unleashed board. Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2019-02-27net: macb: Fix GEM hardware detectionAtish Patra
Fix MID bit field check to correctly identify all GEM hardwares. The check is updated as per macb driver in Linux location: <linux_sources>/drivers/net/ethernet/cadence/macb_main.c:259 Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-02-27net: macb: Fix clk API usage for RISC-V systemsAnup Patel
Don't fail in macb_enable_clk() if clk_enable() returns -ENOSYS because we get -ENOSYS for fixed-rate clocks. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-27riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systemsAnup Patel
On 64bit systems, the DRAM top can be easily beyond 4GB and U-Boot DMA mapping APIs will generate DMA addresses beyond 4GB. This breaks DMA programming in 32bit DMA capable devices (such as Cadence MACB ethernet). For example, If DRAM is more then 2GB on QEMU sifive_u machine then Cadence MACB ethernet stops working for U-Boot because it is a 32bit DMA capable device. To handle 32bit DMA capable devices on 64bit systems, we provide custom implementation of board_get_usable_ram_top() which ensures that usable ram top is not more then 4GB. This in-turn ensures that U-Boot always runs within 4GB hence DMA addresses generated by DMA mapping APIs will be within 4GB too. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-27riscv: Add place-holder asm/arch/clk.h for driver compilationAnup Patel
Some of the drivers (such as Cadence MACB ethernet driver) expect asm/arch/clk.h to be provided by arch support so we add place-holder asm/arch-generic/clk.h for RISC-V generic CPU. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-02-27riscv: Add asm/dma-mapping.h for DMA mappingsAnup Patel
This patch adds asm/dma-mapping.h for Linux-like DMA mappings APIs required by some of the drivers (such as, Cadance MACB Ethernet driver). Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-02-27riscv: Rename cpu/qemu to cpu/genericAnup Patel
The QEMU CPU support under arch/riscv is pretty much generic and works fine for SiFive Unleashed as well. In fact, there will be quite a few RISC-V SOCs for which QEMU CPU support will work fine. This patch renames cpu/qemu to cpu/generic to indicate the above fact. If there are SOC specific errata workarounds required in cpu/generic then those can be done at runtime in cpu/generic based on CPU vendor specific DT compatible string. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-27riscv: Enable create symlink using kconfigAnup Patel
We select CREATE_ARCH_SYMLINK for RISC-V so that we can have include/asm/arch linked to include/asm/arch-xyz. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-26Merge tag 'efi-2019-04-rc3' of https://github.com/xypron2/u-bootTom Rini
Pull request for the UEFI sub-system for v2019.04-rc3 A new option -e is added to the env command which allows to display and change UEFI variables in a user friendly way. A new command efidebug is introduced to edit the UEFI boot sequence and to display different aspects of the state of the UEFI sub-system: memory map, loaded images, handles, drivers and devices. A bug in the UEFI boot manager is fixed.
2019-02-25mmc: renesas: Unconditionally set DTCNTL TAPNUM to 8Marek Vasut
According to latest specification rev.0026 and after confirmation with HW engineer, the DTCNTL register TAPNUM field must be set to 8 even on H3 ES2.0 SoC. Make it so. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-02-25mmc: tmio: Clear BUSWIDTH bit when WMODE bit is setMarek Vasut
According to latest specification rev.0026, when HOST_MODE bit 0 (WMODE) is not set, HOST_MODE bit 8 (BUSWIDTH) is ignored. Clear HOST_MODE bit 8 in such case and align the code with Linux and avoid possible unforeseen issues. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-02-25ARM: rmobile: Convert Gen2 to OF_SEPARATEMarek Vasut
Convert R-Car Gen2 from OF_EMBED to OF_SEPARATE, thus getting rid of one of the deprecation warnings. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-02-25ARM: rmobile: Sync Gen3 defconfigsMarek Vasut
Synchronize Gen3 defconfigs in wake of the Kconfig option changes. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-02-25ARM: rmobile: Imply SoC per boardMarek Vasut
Imply all SoCs supported by a given board. This allows building single U-Boot binary for boards which can have multiple SoCs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-02-25pinctrl: renesas: Drop def_bool per SoCMarek Vasut
Drop per SoC def_bool on each driver, since this is now implied by SoC Kconfig option instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-02-25clk: rmobile: Drop def_bool per SoCMarek Vasut
Drop per SoC def_bool on each driver, since this is now implied by SoC Kconfig option instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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