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Currently, if a test emits a warning message but otherwise passes, there's
no indication of this in the log summary, which can lead to warnings being
missed. Enhance the test logic to explicitly mention warnings in otherwise
passing tests, and not to collapse the log sections for tests with
warnings, so that they're more easily seen when scanning the log.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add a standalone MMC block read test. This allows direct testing of MMC
access rather than relying on doing so as a side-effect of e.g. DFU or
UMS testing, which may not be enabled on all platforms.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Do not need to scan disk every time when we get part info
by name.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[trini: Fix build in !CONFIG_HAVE_BLOCK_DEVICE case]
Signed-off-by: Tom Rini <trini@konsulko.com>
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If a DUT do not have partition table, and we write one with 'gpt write'
cmd, we should able to list the partition with 'part list' cmd.
It's reasonable to scan the disk again if the initial part_type is
unknown in case we just write a new one into disk.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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On linux kernel side, on STM32F7 and STM32H7 SoCs, DMA requires
uncachable regions. These regions are defined in DT.
Since kernel linux v4.15, on ARMv7-M Cortex, kernel is able
to configure MPU regions depending on DT settings.
As kernel is able to configure MPU, this allows to remove
MPU region settings in bootloader.
On Cortex M processors, MPU allows to use a default memory map.
(see B3.5.4 MPU Control Register, MPU_CTRL in
https://developer.arm.com/products/architecture/m-profile/docs/ddi0403/latest/armv7-m-architecture-reference-manual)
Use the default memory map as background region for all STM32 SoCs
family with an additional MPU region corresponding to the SDRAM area.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Enable DOS_PARTITION for boards STM32F429-eval, STM32F469-disco
and STM32F746-disco.
This allows to read FAT partition on mmc.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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This board offers:
_ STM32F746NGH6 microcontroller with 1 Mbyte Flash and 320+4 Kbytes RAM
_ Six 5 V power supply options:
Power jack
ST-LINK/V2-1 USB connector
User USB HS connector
User USB FS1 connector
User USB FS2 connector
Daughterboard
_ SAI Audio DAC, stereo audio jack which supports headset with microphone
_ Stereo digital microphone, audio jack connector used to connect
external speakers
_ 2 Gbytes (or more) SDMMC interface microSD card
_ RF-EEPROM on I2C compatible serial interface
_ RS-232 communication
_ IrDA transceiver
_ JTAG/SWD and ETM trace debug support, ST-LINK/V2-1 embedded
_ IEEE-802.3-2002 compliant Ethernet connector
_ Camera module
_ 8Mx32 bit SDRAM, 1Mx16 bit SRAM & 8Mx16 bit Nor Flash
_ 512 Mbits QuadSPI Nor Flash
_ 5.7 inch 640x480 pixel TFT color LCD with capacitive touch panel
_ Joystick with 4-direction control and selector
_ Reset, WakeUp/Tamper or key button
_ 4 color user LEDs
_ Extension connectors & memory connectors for daughterboard or
wrapping board
_ USB OTG HS and FS with Micro-AB connectors
_ RTC with backup battery
_ CAN 2.0A/B compliant connection
_ Potentiometer
_ Motor control connector
More detailed information are available here :
http://www.st.com/en/evaluation-tools/stm32746g-eval.html
To compile stm32f746-eval board, use same defconfig as
stm32f746-disco, the only difference is to pass
"DEVICE_TREE=stm32746g-eval".
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas Manocha <vikas.manocha@st.com>
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Remove all unused defines
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Remove arch/arm/include/asm/arch-stm32fx/stm32_periph.h
as all defines or enums are no more used.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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For STM32F4 and F7 SoCx family, a specific stm32.h file exists.
Some common defines are duplicated or even unused in each of
these stm32.h.
Factorize all common definition in arch/arm/include/asm/stm32f.h and keep
specific definitions in each arch/arm/include/asm/arch-stm32fx/stm32.h.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Instead to have 3 identical gpio.h for all STM32 SoCs,
migrate them in one file in include/asm.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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fmc.h file is no more used, remove it.
All FMC related defines are declared in drivers/ram/stm32_sdram.c
which is common to all STM32 SoCs.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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This avoids the following errors while reading on mmc:
Read data bytes CRC error: 0x2
switch to partitions #0, OK
mmc0 is current device
Read data bytes CRC error: 0x82002
** Unrecognized filesystem type **
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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DSI clock is available on STM32F769-disco and
STM32F469-disco board.
Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Implement set_rate() for LTDC clock only, set_rate for other
clocks will be added if needed. This is needed by future LTDC driver
improvements.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Configure SAI PLL configuration to generate LTDC pixel clock on
the PLLSAIR output.
PLLSAI is enabled only if CONFIG_VIDEO_STM32 flag is set.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Rework the way SDMMC clock get rate is done in a more
generic way :
_ Add stm32_clk_get_pllsai_rate() which give the PLLSAI
indicated output rate.
_ Add stm32_clk_get_pllsai_vco_rate() which give the VCO
internal rate.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Initially, 48Mhz for SDIO clock was generated from SAI pll for
STM32F469 and STM32F746 SoCs, but this solution was not suitable
for STM32F429 SoCs.
A generic solution is to used the PLL_Q output as 48Mhz clock
for all STM32F SOCs family.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Use the correct name for RCC_PLLSAICFGR_PLLSAIx_MASK masks.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Wrong parameter was passed to stm32_clk_pll48clk_rate().
sysclk (PLL_p output value) was passed instead of VCO value.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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This patch adds "st,pin-ckin" support to activate sdmmc_ckin feature.
When using an external driver (a voltage switch transceiver),
it's advised to select SDMMC_CKIN feedback clock input to sample
the received data.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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The hardware flow control functionality is used to avoid
FIFO underrun (TX mode) and overrun (RX mode) errors.
The behavior is to stop SDMMC_CK during data transfer and
freeze the SDMMC state machines.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Use available DM stm32_timer driver instead of dedicated
mach-stm32/stm32fx/timer.c.
Remove all defines or files previously used for timer usage in
arch/arm/include/asm/arch-stm32fx and in arch/arm/mach-stm32/stm32fx
Enable DM STM32_TIMER for STM32F4/F7 and H7.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Add missing timer node to enable timer5 for STM32F7 SoCs family
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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d1cfgr register was used to calculate the domain 3
prescaler value instead of d3cfgr.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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For timer clock, an additional prescaler is used which
was not taken into account previously.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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For timer clock, an additionnal prescaler is used which was
not taken into account previously.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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This timer driver is using GPT Timer (General Purpose Timer)
available on all STM32 SOCs family.
This driver can be used on STM32F4/F7 and H7 SoCs family
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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RK3288 Vyasa has eMMC boot support, with JP4 open.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Add usb otg support for rk3288-vyasa, board support usb1 otg
power through otg_vbus_drv and naming conversion followed
as per schematic.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Add usb host support for rk3288-vyasa, board support hub power
through phy_pwr_en and usb2 host power through usb2_pwr_en and
naming conversion followed as per schematic.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Enable gmac support for rk3288-vyasa board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Sync gmac dts node from Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Add supporting regulators for rk3288-vyasa board, dc12_vbat is
parent regulatorand followed regulators as are child regulators.
regulator naming conversion followed as per schematic for better
readability and easy for identification.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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rk808, SWITCH_REG1 has configured for sdmmc regulator as vcc_sd,
so use the same by renaming vcc33_sd to vcc_sd(as per schematic)
and drop explicit regulator definition from root.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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vdd_log, never used on DCDC_REG1 of rk808 from latest schematic so
remove the same and update the regulator-name as 'vdd_arm' to sync
with existing rk3288 board dts files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Sync rk3288-vyasa board dts from Linux for proper updates and maintenance
- rk3288-vyasa.dts: Similar to Linux dts
- rk3288-vyasa-u-boot.dtsi: u-boot dts changes
Also updated MAINTAINERS for these dts files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Booting a aarch64 Linux kernel requires the image to be placed
text_offset bytes from a 2MB aligned address.
See https://www.kernel.org/doc/Documentation/arm64/booting.txt
booti_setup() takes care about this alignment and will relocate the
image if not properly aligned with memmove(). This can require up
to double the size of the loaded image and therefore accidentally
overwrite content placed there (i.e ramdisk_addr_r) for large kernel
images.
By adding text_offset to the default kernel_addr_r we can prevent that
from happening for kernels larger 18MB and also save a few cycles.
We can assume a text_offset of 0x80000 for most cases, all others will be
handled by booti_setup() anyway.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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use live dt api to get base addr
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Use live dt api to get cru base addr.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Use live dt api to get cru base addr.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Use live dt api to get cru base addr.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Use live dt api to get cru base addr.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Use live dt api to get cru base addr.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Use live dt api to get cru base addr.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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A20-SOM204 board has option with onboard 16GB eMMC. The chip is wired
to MMC2 slot.
This patch adds defconfig and dts files for this board. The dts is same
with mainline kernel.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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This is new System-On-Module platform with universal dimm socket for
easy insertation. The EVB board is designed to be universal with
future modules.
Base features of A20-SOM204 board includes:
* 1GB DDR3 RAM
* AXP209 PMU
* KSZ9031 Gigabit PHY
* AT24C16 EEPROM
* Status LED
* LCD connector
* GPIO connector
There will be variants with the following options:
* Second LAN8710A Megabit PHY
* 16MB SPI Flash memory
* eMMC card
* ATECC508 crypto device
The EVB board has:
* Debug UART
* MicroSD card connector
* USB-OTG connector
* Two USB host
* RTL8723BS WiFi/BT combo
* IrDA transceiver/receiver
* HDMI connector
* VGA connector
* Megabit ethernet transceiver
* Gigabit ethernet transceiver
* SATA connector
* CAN driver
* CSI camera
* MIC and HP connectors
* PCIe x4 connector
* USB3 connector
* Two UEXT connectors
* Two user LEDs
Some of the features are multiplexed and cannot be used the same time:
CAN and Megabit PHY. Others are not usable with A20 SoC: PCIe and USB3.
This patch adds defconfig and dts files for this board. The dts is same
with mainline kernel, except some nodes are removed to make file
compatible with existing dtsi file.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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CONFIG_PHY_ADDR is used for old-style configuration. This makes
impossible changing the PHY address, if multiple boards share a same
config header file (for example include/configs/sunxi-common.h).
Moving this to Kconfig helps overcoming this issue. It's defined
as entry inside PHYLIB section.
After the implemention, moveconfig was run. The issues are:
- edb9315a - CONFIG_PHYLIB is not enabled. Entry is
deleted.
- ds414 - CONFIG_PHYLIB is in incompatible format:
{ 0x1, 0x0 }. This entry is also deleted.
- devkit3250 - The PHY_ADDR is in hex format (0x1F).
Manually CONFIG_PHY_ADDR=31 is added in
the defconfig.
After the changes the suspicious defconfigs passes building.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
[jagan: rebased on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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