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2023-05-06core: fdtaddr: add devfdt_get_addr_size_index_ptr functionJohan Jonker
Add devfdt_get_addr_size_index_ptr function with the same functionality as devfdt_get_addr_size_index, but instead a return pointer is given. Suggested-by: Michael Nazzareno Trimarchi <michael@amarulasolutions.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-06rockchip: rk3288: syscon_rk3288: store syscon platdata in regmapJohan Jonker
The Rockchip SoC rk3288 has 2 types of device trees floating around. A 64bit reg size when synced from Linux and a 32bit for U-boot. A pre-probe function in the syscon class driver assumes only 32bit. For other odd reg structures the regmap must be defined in the individual syscon driver. Store rk3288 platdata in a regmap before pre-probe during bind. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2023-05-06core: remap: fix regmap_init_mem_plat() reg size handelingJohan Jonker
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so convert regmap_init_mem_plat() input to handel both. The syscon class driver also makes use of the regmap_init_mem_plat() function, but has no way of knowing the format of the device-specific platform data. In case of odd reg structures other then that the syscon class driver assumes the regmap must be filled in the individual syscon driver before pre-probe. Also fix the ARRAY_SIZE divider in the syscon class driver. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-06include: dm: ofnode: fix headersJohan Jonker
When fdt_addr_t and phys_addr_t are split it turns out that the header don't match the functions, so fix the headers. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-06rockchip: spi: rk_spi: use base variable with uintptr_t sizeJohan Jonker
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use a base variable with uintptr_t size in the rk_spi.c file. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-06rockchip: pwm: rk_pwm: use base variable with uintptr_t sizeJohan Jonker
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use a base variable with uintptr_t size in the rk_pwm.c file. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-06rockchip: timer: dw-apb-timer: use regs variable with uintptr_t sizeJohan Jonker
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use a regs variable with uintptr_t size in the dw-apb-timer.c file. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-06rockchip: adc: rockchip-saradc: use dev_read_addr_ptrJohan Jonker
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expext 64-bit data from the device tree parser, so use dev_read_addr_ptr in the rockchip-saradc.c file. As we are there also streamline the error response to -EINVAL on return. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-06mtd: nand: add support for the Sandisk SDTNQGAMA chipJohan Jonker
Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write size and 40 bit ecc support Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-05-06mtd: nand: raw: rockchip_nfc: fix oobfree offset and descriptionJohan Jonker
The MTD framework reserves 1 or 2 bytes for the bad block marker depending on the bus size. The rockchip_nfc driver currently only supports a 8 bit bus, but reserves standard 2 bytes for the BBM. The first free OOB byte is therefore OOB2 at offset 2. Page address(PA) bytes are moved to the last 4 positions before ECC. Update the description for U-boot. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-06mtd: nand: raw: rockchip_nfc: add flash_node to chip structureJohan Jonker
Add flash_node to the rockchip_nfc driver chip structure in order to find the partitions in the add_mtd_partitions_of() function. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-05-06mtd: nand: raw: rockchip_nfc: add layout structureJohan Jonker
The MTD framework in U-boot is not identical for drivers ported from Linux. The rockchip_nfc driver was ported with OOB ops functions while the framework expects a layout structure per chip. Fix by adding a structure with OOB data and remove unused functions. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-05-06mtd: nand: raw: rockchip_nfc: remove the compatible string "rockchip,rk3308-nfc"Johan Jonker
The compatible string for rk3308 has as fallback string "rockchip,rv1108-nfc". As there is no logic in probe priority between the SoC orientated string and the fall back, so remove the compatible string "rockchip,rk3308-nfc" from the driver. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-05-06mtd: nand: raw: rockchip_nfc: use dev_read_addr_ptrJohan Jonker
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expext 64-bit data from the device tree parser, so use dev_read_addr_ptr in the rockchip_nfc.c file. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-05-05Merge tag 'video-for-v2023.07-rc2' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-video - enable video support in SPL - support splash screen for TI am62x - replace #ifdef and #if with if's in bmp/splash - add lm3533 backlight driver - add Solomon SSD2825 DSI/LVDS bridge driver - add Renesas R61307 and R69328 MIPI DSI panel drivers - add tegra DC based PWM backlight driver - add generic endeavoru (HTC One X) panel driver
2023-05-05Merge tag 'fsl-qoirq-2023-5-5' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq fsl-ls1088a device tree update enable DM_SERIAL for ten64 check for crypto node first in fdt_fixup_remove_jr
2023-05-05arm: dts: ten64: fix header typo and update copyrightMathew McBride
Somehow, I managed to typo our company name in the U-Boot and Linux kernel submissions. Fix this and update the copyright year at the same time. Signed-off-by: Mathew McBride <matt@traverse.com.au> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05arm: dts: ten64: syncronise device tree with LinuxMathew McBride
This synchronises the Linux device tree with U-Boot (cp linux/..../fsl-ls1088a-ten64.dts uboot/..../fsl-ls1088a-ten64.dts), as of Linux v6.2-rc5. Missing from the U-Boot copy previously was the Ethernet PCS definitions (required for linking with PHY in Linux but not used by U-Boot) and various upstream fixes and formatting changes. The board microcontroller (which doesn't have a Linux driver) has been moved to the -u-boot.dtsi, as well as the spi0 quadspi alias (used by U-boot 'sf' but not valid for Linux). Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05arm: dts: fsl-ls1088a: copy all missing bindings from LinuxMathew McBride
This is effectively: cp linux/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi \ u-boot/arch/arm/dts/fsl-ls1088a.dtsi Tested working with Ten64 board (LS1088A) booting openSUSE Tumbleweed. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05arm: dts: fsl-ls1088a: move and sync existing bindings to be under /socMathew McBride
Our [U-Boot] copy of fsl-ls1088a.dtsi had all the hardware under the top level, until the DM_SERIAL implementation recently. In this commit, remove any remaining devices (that were in U-Boot, but not touched by previous patches in this series) to be under /soc, updating to their upstream (Linux) bindings. The bindings have been copied closest to their relative positions in the Linux version, so the eventual result is that the U-Boot and Linux fsl-ls1088a.dtsi will be identical. The next commit will add the hardware bindings that were not in U-Boot. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05arm: dts: fsl-ls1088a: syncronise fsl-mc definition with LinuxMathew McBride
This moves the fsl-mc device tree definition under the /soc node, as well as adding interrupt and IOMMU definitions that were not in U-Boot before. There are slight differences between the two bindings as we add a "simple-mfd" compatible to function under U-Boot's driver model. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05arm: dts: fsl-ls1088a: syncronise MDIO+PCS U-Boot definitions with LinuxMathew McBride
Synchronise the MDIO controller definitions with Linux, so the controllers will be usable when passing U-Boot's control FDT to Linux. This also adds the PCS (internal controller) definitions which are not used by U-Boot. Caveat: The kernel definition uses "fsl,fman-memac-mdio", as with other members of the Layerscape family, but U-Boot uses a different driver for the DPAA2 Family devices (LS1088/LS2088/LX2160). So we use "fsl,ls-mdio" as the first compatible string for these devices. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05arm: dts: fsl-ls1088a: sync usb controller nodes with LinuxMathew McBride
Synchronise the USB device tree definition with Linux, allowing the U-Boot control FDT to be used to boot a Linux system with working USB. An extra compatible string, "fsl,layerscape-dwc3" is needed for special handling in U-Boot, so has been added to the -u-boot.dtsi file. It might be better to add this to the Linux source bindings. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05arm: dts: fsl-ls1088a: move I2C nodes under "soc" and syncronize with LinuxMathew McBride
U-Boot's definition for the I2C controllers did not contain any clock information. This resulted in the I2C not functioning when the U-Boot control FDT was passed to Linux. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05arm: dts: fsl-ls1088a: move GPIO controller under "soc" per LinuxMathew McBride
Move the GPIO controller definitions under the "soc" and in the same relative position as the Linux kernel fsl-ls1088a.dtsi. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05arm: dts: fsl-ls1088a: import CPU definition from Linux kernelMathew McBride
This is required for Linux to boot using the same FDT as U-Boot (such as passing the control FDT to bootefi). Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05arm: dts: fsl-ls1088a: match Linux FDT by disabling PCIe by defaultMathew McBride
The Linux kernel fsl-ls1088a.dtsi disables (status="disabled") all PCIe controllers by default, with the bootloader (i.e U-Boot) enabling the appropriate controllers (specified by the board reset control word/RCW) by FDT fixup. However, U-Boot needs these controllers to be enabled to be usable, which we can add in the u-boot only dtsi. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05arm: dts: fsl-ls1088a: sync PCIe controller definition with LinuxMathew McBride
This moves the PCIe controller definitions under /soc and adopts the same bindings (fsl,ls1088a-pcie) as Linux. Previously, the format was different between the two versions. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05arm: dts: fsl-ls1088a: import and sync full SMMU nodes with LinuxMathew McBride
To synchronise the device tree in U-Boot with Linux, the GIC (Interrupt Controller) and SMMU/IOMMU nodes need to be synchronised before changing any dependent components like PCIe and DPAA2/fsl-mc. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05pci: layerscape: add support for kernel/official fsl, ls1088a-pcie bindingMathew McBride
This allows the Layerscape PCIe RC driver to use the upstream style binding (two "reg" entries instead of four). It is similar to the previous commit e10da1f985ad ("pci: layerscape: add official ls1028a binding support") which implemented this for the LS1028A. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05arm: dts: fsl-ls1088a: move memory node into U-Boot specific fileMathew McBride
The top-level "memory" node does not exist in the Linux version of the fsl-ls1088a.dtsi file. Move it to the U-Boot "tweak" file, so we can have an identical copy of fsl-ls1088a.dtsi between the projects in the end. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05arm: dts: fsl-ls1088a: move u-boot bootph tags into u-boot only filesMathew McBride
This moves the bootph-all tags that were added in commit a593c1fec579 ("arch: arm: dts: fsl-ls1088a.dtsi: tag serial nodes with bootph-all") into a u-boot only include. Due to the way the U-Boot device tree "tweak" system is setup[1], we need to have a per-board <boardname>-u-boot.dtsi, which will include the "fsl-ls1088a-u-boot.dtsi" tweaks. By doing so, future updates to fsl-ls1088a.dtsi from upstream (Linux kernel) can just be copied directly into the U-Boot tree, without worrying about any extra data local to U-Boot. Signed-off-by: Mathew McBride <matt@traverse.com.au> [1] - https://u-boot.readthedocs.io/en/latest/develop/devicetree/control.html#adding-tweaks-for-u-boot The CONFIG_SYS_SOC, CONFIG_SYS_CPU and CONFIG_SYS_VENDOR values are the same for the entire Layerscape family, meaning there is no ability to create a LS1088A only file here. But we will be adding per-board tweaks later in any case. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05configs: ten64: enable DM_SERIALMathew McBride
The recent series "Convert LS1088A and LX2160 to DM_SERIAL" from Ioana Ciornei provided the necessary support to enable DM_SERIAL on the Ten64 board (LS1088A). Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05armv8: fsl-layerscape: check for crypto node first in fdt_fixup_remove_jrMathew McBride
This a problem I found while updating the U-Boot fsl-ls1088a.dtsi to match the Linux version. fdt_fixup_remove_jr did not check whether there was a "crypto" alias in the device tree before calling more fdt_* functions, which resulted in a crash. Fixes: a797f274 ("ARMv8/sec_firmware : Update chosen/kaslr-seed with random number") Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-04Merge branch '2023-05-04-assorted-TI-updates'Tom Rini
- Clean up / merge some defconfigs, update DDR timings and a few more assorted fixes.
2023-05-04arm: dts: k3-j7200: ddr: Update to 0.6 version of DDR config toolNeha Malcom Francis
Update the DDR settings to those generated using 0.6 version of Jacinto 7 DDRSS Register Configuration tool. Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com>
2023-05-04arm: dts: k3-j721e: ddr: Update to 0.9.1 version of DDR config toolNeha Malcom Francis
Update the DDR settings to those generated using 0.9.1 version of Jacinto 7 DDRSS Register Configuration tool. Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com>
2023-05-04configs: j7200: Merge the HS and non-HS defconfigsManorit Chawdhry
K3 devices have runtime type board detection. Make the default defconfig include the secure configuration. Then remove the HS specific config. Non-HS devices will continue to boot due to runtime device type detection. If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS devices these can be ignored. Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-04Kconfig: j721s2: Change K3_MCU_SCRATCHPAD_BASE to non firewalled regionManorit Chawdhry
On K3 HS-SE devices all the firewalls are locked by default until sysfw comes up. Rom configures some of the firewall for its usage along with the SRAM for R5 but the PSRAM region is still locked. The K3 MCU Scratchpad for j721s2 was set to a PSRAM region triggering the firewall exception before sysfw came up. The exception started happening after adding multi dtb support that accesses the scratchpad for reading EEPROM contents. Old map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c61f20 (approx) │ STACK │ ├─────────────────────────────────────┤ 0x41c65f20 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c66000 │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x10000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41c76000) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ ├─────────────────────────────────────┤ (0x41c80000) │ DM DATA │ ├─────────────────────────────────────┤ (0x41c84130) (approx) │ EMPTY │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x41cffbfc) New map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c61f20 (approx) │ STACK │ ├─────────────────────────────────────┤ 0x41c65f20 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c66000 │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x10000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41c76000) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ ├─────────────────────────────────────┤ (0x41c80000) │ DM DATA │ ├─────────────────────────────────────┤ (0x41c84130) (approx) │ EMPTY │ ├─────────────────────────────────────┤ SYS_K3_MCU_SCRATCHPAD_BASE │ SCRATCHPAD │ (0x41cff9fc) │ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x41cffbfc) Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-04configs: j721s2: Merge the HS and non-HS defconfigsManorit Chawdhry
K3 devices have runtime type board detection. Make the default defconfig include the secure configuration. Then remove the HS specific config. Non-HS devices will continue to boot due to runtime device type detection. If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS devices these can be ignored. Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-04arm: dts: iot2050: Include u-boot specific bits implicitlyJan Kiszka
Create *-u-boot.dtsi files for each target dtb of the IOT2050 series so that we can drop the #include deviations from upstream dts[i] files here. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-05-04environment: ti: Add get_fit_config command to get FIT config stringAndrew Davis
When OE is packaging a dtb file into the FIT image it names the node based on the dtb filename. Node names can't have "/" so it is turned into "_". We select our FIT config using the "fdtfile" env var so we don't duplicate the board_name to fdt logic. Result is fdtfile needs mangled when used to select a config node from OE made FIT image. Do this here. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2023-05-04configs: am62x: enable secure device configs by defaultPraneeth Bajjuri
Enable the CONFIG_TI_SECURE_DEVICE by default Non-HS devices will continue to boot due to runtime device type detection. TI's security enforcing SoCs will authenticate each binary it loads by comparing it's signature with keys etched into the SoC during the boot up process. The am62x family of SoCs by default will have some level of security enforcement checking. To keep things as simple as possible, enable the CONFIG_TI_SECURE_DEVICE options by default so all levels of secure SoCs will work out of the box Signed-off-by: Praneeth Bajjuri <praneeth@ti.com> Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com> Signed-off-by: Bryan Brattlof <bb@ti.com>
2023-05-04k3: pmic: Clear ESM masksNeha Malcom Francis
ESM MCU masks must be set to 0h so that PMIC can handle errors that require attention for example SYS_SAFETY_ERRn. The required bits must be cleared: ESM_MCU_RST_MASK, ESM_MCU_FAIL_MASK, ESM_MCU_PIN_MASK. If PMIC expected to handle errors, make sure EVM is configured to connect SOC_SAFETY_ERRz (Main) to the PMIC. Note that even though the User Guide for TPS65941 for J721E mentions that these bits are reset to 0h; it is not reflected once board boots to kernel, possibly due to NVM configurations. Eithercase, it is best to account for this from R5 SPL side as well. Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-05-04Merge branch '2023-05-03-assorted-updates-and-fixes'Tom Rini
- Various typo fixes, pass -Werror to host tools builds, bdi cleanups, fix hush and local variables, a FSL PCI fix and correct some python in one of the tests.
2023-05-04Merge tag 'efi-2023-07-rc2' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request efi-2023-07-rc2 Documentation: * treat documentation warnings as errors in CI * adjust StarFive VisionFive 2 and SiFive Unmatched documentation * man-page for cp * correct description of uclass_get_device_by_of_path * correct proftool usage UEFI * Fix documentation of EFI Python tests * Rename efi_selftest Python test
2023-05-04CI: treat documentation warnings as errorsHeinrich Schuchardt
We do not want to merge documentation that produces Sphinx warnings. scripts/kernel-doc uses environment variable KDOC_WERROR to determine if warnings should be treated as errors. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-04efi: Rename the base efi self-testSimon Glass
This function uses the same base name as all the others in this file, so it is not easy to run just that one test. Add a _base suffix so that it can be run on its own. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-05-04doc: man-page for cpHeinrich Schuchardt
Add a man-page for the cp command. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-04test: fix pydoc issues for EFI testsHeinrich Schuchardt
Fix issues reported by pydocstyle. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>