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2021-03-22tools: fdtgrep: Use unsigned chars for arraysSamuel Dionne-Riel
Otherwise, values over 127 end up prefixed with ffffff. Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-22sandbox: allow cross-compiling sandboxHeinrich Schuchardt
UEFI test files like helloworld.efi require an architecture specific PE-COFF header. Currently this does not work for cross compiling. If $CROSS_COMPILE is set, use the first part of the architecture triplet from the variable to choose the PE-COFF header. Now we can cross-compile the sandbox, e.g. make sandbox_defconfig NO_SDL=1 CROSS_COMPILE=/opt/bin/aarch64-linux-gnu- NO_SDL=1 MK_ARCH=aarch64 make Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-22patman: Quieten down the alias checkingSimon Glass
When a tag is used in a patch subject (e.g. "tag: rest of message") and it cannot be found as an alias, patman currently reports a fatal error, unless -t is provided, in which case it reports a warning. Experience suggest that the fatal error is not very useful. Instead, default to reporting a warning, with -t tell patman to ignore it altogether. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22patman: Update documentation to match new usageSimon Glass
With the subcommands some of the documentation examples are no-longer correct. Fix all of them, so it is consistent. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22azure: Use --board flag with sandbox_splSimon Glass
At present there is only one board which uses sandbox SPL. But with sandbox_noinst being added, this is no longer true. Add a --board flag so that we just build one board on azure, as is done in gitlab. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-03-20Merge branch '2021-03-20-mediatek-updates' into nextTom Rini
- A number of MediaTek platform updates
2021-03-20tools: mtk_image: add an option to set device header offsetWeijie Gao
This patch adds an option which allows setting the device header offset. This is useful if this tool is used to generate ATF BL2 image of mt7622 for SD cards. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20configs: mt7622: enable debug uart for mt7622_rfb_defconfigWeijie Gao
Enable debug uart for mt7622_rfb_defconfig Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20board: mt7629: enable compression of u-boot to reduce the size of final imageWeijie Gao
This patch makes use of the decompression mechanism implemented for mt7628 previously to reduce the total image size. Binman will be also removed. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20serial: mtk: rewrite the setbrg functionWeijie Gao
Currently the setbrg logic of serial-mtk is messy, and should be rewritten. Also an option is added to make it possible to use highspeed-3 mode for all bauds. The new logic is: 1. If baud clock > 12MHz a) If baud <= 115200, highspeed-0 mode will be used (ns16550 compatible) b) If baud <= 576000, highspeed-2 mode will be used c) any bauds > 576000, highspeed-3 mode will be used 2. If baud clock <= 12MHz Forced highspeed-3 mode a) If baud <= 115200, calculates the divisor using DIV_ROUND_CLOSEST b) any bauds > 115200, the same as 1. c) Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20dts: mt7629: enable JTAG pins by defaultWeijie Gao
The EPHY LEDs belongs to the built-in FE switch of MT7629, which is barely used. These LED pins on reference boards are used as JTAG socket. So it's a good idea to change the default state to JTAG, and this will make it convenience for debugging. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20configs: mt7622: use ARMv8 Generic Timer instead of mtk_timerWeijie Gao
It's better to use the generic timer which is correctly initialized by the ATF. The generic timer has higher resolution than the mtk_timer. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20pinctrl: mt7629: add jtag function and pin groupWeijie Gao
The EPHY LEDs of mt7629 can be used as JTAG. This patch adds the jtag pin group to the pinctrl driver. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20pinctrl: mediatek: do not probe gpio driver if not enabledWeijie Gao
The mtk pinctrl driver is a combination driver with support for both pinctrl and gpio. When this driver is used in SPL, gpio support may not be enabled, and this will result in a compilation error. To fix this, macros are added to make sure gpio related code will only be compiled when gpio support is enabled. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20pinctrl: mediatek: add get_pin_muxing ops for mediatek pinctrlSam Shih
This patch add get_pin_muxing support for mediatek pinctrl drivers Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2021-03-20pinctrl: mediatek: fix wrong assignment in mtk_get_pin_nameSam Shih
This is a bug fix for mtk pinctrl common part. Appearently pins should be used instead of grps in mtk_get_pin_name(). Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2021-03-20board: Add MT8183 pumpkin board supportFabien Parent
Add the MT8183 pumpkin board support. Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-03-20ARM: mediatek: Add MT8183 supportFabien Parent
Add the MT8183 SoC support. Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-03-20configs: mt8516: use bootcmd from config_distro_bootcmd.hFabien Parent
Instead of redefining our own way to boot, let's just use config_distro_bootcmd.h. Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-03-20board: mediatek: mt8516: init USB Ether for pumpkin boardFabien Parent
Init USB Ether if CONFIG_USB_ETHER is enabled. Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-03-20board: mediatek: rename pumpkin board into mt8516Fabien Parent
More than one pumpkin board has been made with different MediaTek SoCs. Rename the pumpkin board to follow the naming convention of all other MediaTek boards and also to not be confusing when other pumpkin boards will be added in follow-up commits. Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-03-19Merge branch 'next' of git://source.denx.de/u-boot-sh into nextTom Rini
- New platforms and related support
2021-03-16board: silinux: Enable recovery SPL for EK874 boardLad Prabhakar
Enable building SPL for EK874 board which is based on R8A774C0 SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16arm: rmobile: Add Silicon Linux EK874 board supportLad Prabhakar
The EK874 development kit from Silicon Linux is made of CAT874 (the main board) and CAT875 (the sub board that goes on top of CAT874). This patch adds the required board support to boot Si-Linux EK874 board based on R8A774C0 SoC. DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi have been imported from Linux kernel 5.11 commit f40ddce88593 ("Linux 5.11"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16pinctrl: renesas: Add support for R8A774C0Lad Prabhakar
Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car E3 (a.k.a. r8a77990), however it doesn't have several automotive specific peripherals. This patch hooks R8A774C0 SoC with the pfc driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16pinctrl: renesas: pfc-r8a77990: Sync PFC tables with Linux 5.11Lad Prabhakar
Sync the R8A77990 SoC PFC tables with Linux 5.11 , commit f40ddce88593. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16arm: dts: r8a774c0: Resync R8A774C0 SoC DTSI with Linux 5.11Lad Prabhakar
Resync the R8A774C0 SoC DTSI with Linux kernel 5.11 commit f40ddce88593 ("Linux 5.11"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16arm: rmobile: Add HopeRun HiHope RZ/G2H board supportBiju Das
The HiHope RZ/G2H board from HopeRun consists of main board (HopeRun HiHope RZ/G2H main board) and sub board(HopeRun HiHope RZ/G2H sub board). The HiHope RZ/G2H sub board sits below the HiHope RZ/G2H main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2H board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16arm: rmobile: Add HopeRun HiHope RZ/G2N board supportBiju Das
The HiHope RZ/G2N board from HopeRun consists of main board (HopeRun HiHope RZ/G2N main board) and sub board(HopeRun HiHope RZ/G2N sub board). The HiHope RZ/G2N sub board sits below the HiHope RZ/G2N main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2N board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16arm: rmobile: Add HopeRun HiHope RZ/G2M board supportBiju Das
The HiHope RZ/G2M board from HopeRun consists of main board (HopeRun HiHope RZ/G2M main board) and sub board(HopeRun HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits below the HiHope RZ/G2M main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2M board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16arm: dts: rmobile: r8a774e1: Synchronize DTs with Linux 5.11Biju Das
Synchronize r8a774e1 device trees with Linux 5.11, commit f40ddce88593482919 ("Linux 5.11"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16arm: dts: rmobile: r8a774b1: Synchronize DTs with Linux 5.11Biju Das
Synchronize r8a774b1 device trees with Linux 5.11, commit f40ddce88593482919 ("Linux 5.11") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-15Merge tag 'v2021.04-rc4' into nextTom Rini
Prepare v2021.04-rc4
2021-03-15Prepare v2021.04-rc4Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-03-15configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-03-15Merge tag 'ti-v2021.04-rc4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-ti - Fix boot for da850-evm and omap3_logic - Optimize SPL size for am65x boards
2021-03-15Merge tag 'u-boot-stm32-20210312' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm - Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver - stm32mp1_trusted_defconfig rely on SCMI support - Remove the nand MTD configuration for NOR boot in stm32mp1 board - STM32programmer update - Bsec: manage clock when present in device tree - stm32mp15: move bootdelay configuration in defconfig - Update for stm32 dsi and dw_mipi_dsi - STM32 MCU's cleanup - Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags - Update stm32mp1 doc
2021-03-15Merge branch '2021-03-12-assorted-improvements' into nextTom Rini
- More log enhancements - A few warning fixes in some cases - Secure Channel Protocol 03 (SCP03) support for TEEs
2021-03-15configs: am65x_evm_r5: Enable checks for spl and stack sizesLokesh Vutla
Enable relevant configs that checks for the size of image and stack: BSS: 3KB Initial MALLOC: ~22KB Initial Stack: 8K SPL Image size can be: ~215KB Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-03-15include: configs: am65x_evm: Optimize size of SPL BSSLokesh Vutla
Current BSS allocation of SPL is as below: $ size spl/u-boot-spl text data bss dec hex filename 132369 7852 1496 141717 22995 spl/u-boot-spl But 20KB is allocated currently for BSS. Reduce it to 3KB and save some space for stack. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-03-15ARM: da850-evm: Fix boot issues from missing SPL_PAD_TOAdam Ford
In a previous attempt to unify config options and remove items from the whitelist file, SPL items were moved into a section enabled with CONFIG_SPL_BUILD. Unfortunately, SPL_PAD_TO is referenced at the head Makefile and uses this define to create padding of the output file. When it was moved to CONFIG_SPL_BUILD, it caused boot errors with devices that are not booting from NOR. Fix the boot issues by moving SPL_PAD_TO out so it's always. Fixes: 7bb33e4684aa ("ARM: da850-evm: Unify config options with Kconfig") Signed-off-by: Adam Ford <aford173@gmail.com>
2021-03-15configs: omap3_logic: Enable CONFIG_SPL_ALLOC_BDAdam Ford
With bd_info dropped from the data section, the Logic PD OMAP3 boards and AM3517 fail to boot. Enabling CONFIG_SPL_ALLOC_BD restores them. Fixes: 38d6b7ebdaee ("spl: Drop bd_info in the data section") Signed-off-by: Adam Ford <aford173@gmail.com>
2021-03-14test: py: add initial coverage for scp03 cmdIgor Opaniuk
Add initial test coverage for SCP03 command. Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-14sandbox: imply SCP03 and CMD_SCP03Igor Opaniuk
Enable by default SCP_03/CMD_SCP03 for sandbox target. Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-14doc: describe the scp03 commandJorge Ramirez-Ortiz
The Secure Channel Protocol 03 command sends control requests (enable/provision) to the TEE implementing the protocol between the processor and the secure element. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-14drivers: tee: sandbox: SCP03 control emulatorJorge Ramirez-Ortiz
Adds support for a working SCP03 emulation. Input parameters are validated however the commands (enable, provision) executed by the TEE are assumed to always succeed. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-13cmd: SCP03: enable and provision commandJorge Ramirez-Ortiz
Enable and provision the SCP03 keys on a TEE controlled secured elemt from the U-Boot shell. Executing this command will generate and program new SCP03 encryption keys on the secure element NVM. Depending on the TEE implementation, the keys would then be stored in some persistent storage or better derived from some platform secret (so they can't be lost). Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2021-03-13common: SCP03 control (enable and provision of keys)Jorge Ramirez-Ortiz
This Trusted Application allows enabling SCP03 as well as provisioning the keys on TEE controlled secure element (ie, NXP SE050). All the information flowing on buses (ie I2C) between the processor and the secure element must be encrypted. Secure elements are pre-provisioned with a set of keys known to the user so that the secure channel protocol (encryption) can be enforced on the first boot. This situation is however unsafe since the keys are publically available. For example, in the case of the NXP SE050, these keys would be available in the OP-TEE source tree [2] and of course in the documentation corresponding to the part. To address that, users are required to rotate/provision those keys (ie, generate new keys and write them in the secure element's persistent memory). For information on SCP03, check the Global Platform HomePage and google for that term [1] [1] globalplatform.org [2] https://github.com/OP-TEE/optee_os/ check: core/drivers/crypto/se050/adaptors/utils/scp_config.c Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-13doc: sandbox: Update instructions on quittingSimon Glass
The 'reset' command now resets sandbox but does not quit it. Fix the instructions. Fixes: 329dccc0675 ("sandbox: implement reset") Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-13test: acpi: Fix warnings on 32-bit buildSimon Glass
Some format strings use the wrong type. Fix them. Example warnings: In file included from test/dm/acpi.c:22: test/dm/acpi.c: In function ‘dm_test_acpi_cmd_list’: test/dm/acpi.c:362:21: warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but argument 4 has type ‘unsigned int’ [-Wformat=] ut_assert_nextline("RSDP %08lx %06lx (v02 U-BOOT)", addr, ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ sizeof(struct acpi_rsdp)); ~~~~~~~~~~~~~~~~~~~~~~~~ include/test/ut.h:282:33: note: in definition of macro ‘ut_assert_nextline’ if (ut_check_console_line(uts, fmt, ##args)) { \ ^~~ Signed-off-by: Simon Glass <sjg@chromium.org>
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