Age | Commit message (Expand) | Author |
---|---|---|
2016-03-15 | arm64: Remove non-full-va map code | Alexander Graf |
2016-03-15 | thunderx: Move mmu table into board file | Alexander Graf |
2016-03-15 | arm64: Make full va map code more dynamic | Alexander Graf |
2016-03-15 | arm64: Disable TTBR1 maps in EL1 | Alexander Graf |
2016-03-15 | thunderx: Calculate TCR dynamically | Alexander Graf |
2016-01-19 | armv8: New MMU setup code allowing to use 48+ bits PA/VA | Sergey Temerkhanov |
2015-11-30 | armv8/layerscape: Update MMU table with execute-never bits | Alison Wang |
2015-10-29 | armv8/fsl_lsch2: Add fsl_lsch2 SoC | Mingkai Hu |
2015-10-15 | armv8/mmu: Set bits marked RES1 in TCR | Thierry Reding |
2015-10-15 | armv8/mmu: Clean up TCR programming | Thierry Reding |
2015-09-01 | armv8: fsl-lsch3: Rewrite MMU translation table entries | Alison Wang |
2015-07-20 | armv8: Fix TCR macros for shareability attribute | Zhichun Hua |
2015-02-24 | armv8/fsl-lsch3: Change normal memory shareability | York Sun |
2014-07-03 | ARMv8: Adjust MMU setup | York Sun |
2014-01-09 | arm64: core support | David Feng |