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AgeCommit message (Expand)Author
2018-08-24ARM: socfpga: Convert Arria10 to timer frameworkMarek Vasut
2018-08-24ARM: socfpga: Reorder Arria10 SPLMarek Vasut
2018-08-24arm: socfpga: stratix10: Fix mailbox urgent command with urgent registerLey Foon Tan
2018-08-24arm: socfpga: stratix10: Enable EMAC to FPGA bridge based on handoffLey Foon Tan
2018-08-15arm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit maskLey Foon Tan
2018-08-13ARM: socfpga: clk: Convert to clock frameworkMarek Vasut
2018-08-13ARM: socfpga: clk: Drop unused variables on Arria10Marek Vasut
2018-08-13ARM: socfpga: clk: Make L4SP and MMC clock calculation Gen5 onlyMarek Vasut
2018-08-13ARM: socfpga: clk: Obtain handoff base clock via DMMarek Vasut
2018-08-13ARM: socfpga: Remove adhoc ethernet reset and configurationMarek Vasut
2018-08-13ARM: socfpga: Zap unused reset codeMarek Vasut
2018-08-13ARM: socfpga: Zap all the UART handling complexityMarek Vasut
2018-08-13ARM: socfpga: Enable DM I2C framework on A10Marek Vasut
2018-08-13ARM: socfpga: Enable DM reset framework on A10Marek Vasut
2018-08-13ARM: socfpga: Register the FPGA on A10 in SPL againMarek Vasut
2018-08-13arm: socfpga: gen5: combine some init code for SPL and U-BootSimon Goldschmidt
2018-08-13arm: socfpga: cyclone5: handle debug uartSimon Goldschmidt
2018-08-13arm: socfpga: spl_gen5: clean up malloc_base assignmentSimon Goldschmidt
2018-08-13arm: socfpga: fix SPL on gen5 after moving to DM serialSimon Goldschmidt
2018-07-30Kconfig: Sort bool, default, select and imply optionsMichal Simek
2018-07-25ARM: socfpga: Init missing security policies on A10Marek Vasut
2018-07-25ARM: socfpga: Assure correct CPACR configurationMarek Vasut
2018-07-19lib: fdtdec: Rename routine fdtdec_setup_memory_size()Siva Durga Prasad Paladugu
2018-07-13Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2018-07-12arm: socfpga: Fixes: include <debug_uart.h>Ley Foon Tan
2018-07-12arm: socfpga: Fix: Compile MCR instruction on ARM 32-bit onlyLey Foon Tan
2018-07-12ARM: socfpga: Assure correct ACTLR configurationMarek Vasut
2018-07-12ARM: socfpga: Pull DRAM size from DTMarek Vasut
2018-07-12arm: socfpga: Add do_bridge_reset for Arria 10Ley Foon Tan
2018-07-12arm: socfpga: stratix10: Enable Stratix10 SoC buildLey Foon Tan
2018-07-12ddr: altera: stratix10: Add DDR support for Stratix10 SoCLey Foon Tan
2018-07-12arm: socfpga: stratix10: Add timer support for Stratix10 SoCLey Foon Tan
2018-07-12arm: socfpga: stratix10: Add SPL driver for Stratix10 SoCLey Foon Tan
2018-07-12arm: socfpga: Restructure the SPL fileLey Foon Tan
2018-07-12arm: socfpga: stratix10: Add MMU support for Stratix10 SoCLey Foon Tan
2018-07-12arm: socfpga: stratix10: Add mailbox support for Stratix10 SoCLey Foon Tan
2018-07-12arm: socfpga: stratix10: Add misc support for Stratix10 SoCLey Foon Tan
2018-07-12arm: socfpga: misc: Move bridge command to misc commonLey Foon Tan
2018-07-02board/aries: RemoveTom Rini
2018-05-20SPDX: Fixup SPDX tags in a few new filesTom Rini
2018-05-18arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switchLey Foon Tan
2018-05-18arm: socfpga: stratix10: Add pinmux support for Stratix10 SoCLey Foon Tan
2018-05-18arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoCLey Foon Tan
2018-05-18arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoCLey Foon Tan
2018-05-18arm: socfpga: stratix10: Add watchdog and firewall base addressesLey Foon Tan
2018-05-18ARM: socfpga: Fix Documentation errors in scu_registersBen Kalo
2018-05-18ARM: socfpga: Adding SoCFPGA info for both SPL and U-BootTien Fong Chee
2018-05-18ARM: socfpga: Adding clock frequency info for U-BootTien Fong Chee
2018-05-18configs: Add DDR Kconfig support for Arria 10Tien Fong Chee
2018-05-18ARM: socfpga: Add DDR driver for Arria 10Tien Fong Chee