u-boot.git - U-Boot bootloader

Age	Commit message (Expand)	Author
2024-05-14	andes: Unify naming policy for Andes related source	Leo Yu-Chi Liang
2024-04-09	riscv: Move virtio scan to board_late_init()	Łukasz Stelmach
2024-04-09	riscv: cpu: cv1800b: Add support for cv1800b SoC	Kongyang Liu
2024-04-09	riscv: add backtrace support	Ben Dooks
2024-03-13	Kconfig: move CONFIG_32/64BIT to arch/Kconfig	Dan Carpenter
2024-01-31	riscv: sophgo: milkv_duo: initial support added	Kongyang Liu
2023-12-18	riscv: Add support for AMD/Xilinx MicroBlaze V	Michal Simek
2023-11-02	riscv: Sort target configs alphabetically	Samuel Holland
2023-10-30	Kconfig: Remove all default n/no options	Michal Simek
2023-10-19	riscv: Add Zbb support for building U-Boot	Yu Chien Peter Lin
2023-10-19	riscv: kconfig: introduce SPL_LOAD_FIT_OPENSBI_OS_BOOT symbol	Randolph
2023-10-04	configs: andes: add vender prefix for target name	Randolph
2023-10-04	riscv: enable CONFIG_DEBUG_UART by default	Heinrich Schuchardt
2023-09-26	riscv: set fdtfile on VisionFive 2	Heinrich Schuchardt
2023-08-10	riscv: Kconfig: Add SPL_ZERO_MEM_BEFORE_USE	Shengyu Qu
2023-07-12	riscv: t-head: licheepi4a: initial support added	Yixun Lan
2023-07-12	riscv: Rename SiFive CLINT to RISC-V ALINT	Bin Meng
2023-07-12	riscv: clint: Update the sifive clint ipi driver to support aclint	Bin Meng
2023-04-20	board: starfive: Add TARGET_STARFIVE_VISIONFIVE2 to Kconfig	Yanhong Wang
2023-02-17	riscv: Rename Andes cpu and board names	Leo Yu-Chi Liang
2022-11-15	riscv: clarify meaning of CONFIG_SBI_V02	Heinrich Schuchardt
2022-11-03	riscv: Rename Andes PLIC to PLICSW	Yu Chien Peter Lin
2022-10-20	riscv: support building double-float modules	Heinrich Schuchardt
2022-09-26	riscv: Introduce AVAILABLE_HARTS	Rick Chen
2022-09-26	spl: introduce SPL_XIP to config	Nikita Shubin
2022-04-06	riscv: alloc space exhausted	Heinrich Schuchardt
2021-09-16	Merge tag 'v2021.10-rc4' into next	Tom Rini
2021-09-07	riscv: lib: implement enable_caches for sifive cache	Zong Li
2021-08-31	Kconfig: Remove all default n/no options	Michal Simek
2021-08-31	Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig	Tom Rini
2021-07-06	board: riscv: add openpiton-riscv64 SoC support	Tianrui Wei
2021-05-31	board: sifive: add HiFive Unmatched board support	Green Wan
2021-05-31	riscv: cpu: fu740: Add support for cpu fu740	Green Wan
2021-05-17	riscv: Group assembly optimized implementation of memory routines into a submenu	Bin Meng
2021-05-17	riscv: Split SiFive CLINT support between SPL and U-Boot proper	Bin Meng
2021-04-08	riscv: assembler versions of memcpy, memmove, memset	Heinrich Schuchardt
2021-04-08	riscv: sifive: Rename fu540 board to unleashed	Bin Meng
2021-01-18	riscv: Add DMA 64-bit address support	Padmarao Begari
2020-10-26	riscv: Move Andes PLMT driver to drivers/timer	Sean Anderson
2020-10-26	riscv: Only enable OF_BOARD_FIXUP for S-Mode	Sean Anderson
2020-09-30	riscv: Rework Sifive CLINT as UCLASS_TIMER driver	Sean Anderson
2020-09-30	riscv: Rework Andes PLMT as a UCLASS_TIMER driver	Sean Anderson
2020-09-30	riscv: Rework riscv timer driver to only support S-mode	Sean Anderson
2020-07-06	Merge branch 'next'	Tom Rini
2020-07-02	riscv: Enable CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE	Bin Meng
2020-07-01	riscv: Add Sipeed Maix support	Sean Anderson
2020-07-01	riscv: Add option to support RISC-V privileged spec 1.9	Sean Anderson
2020-06-04	riscv: cpu: fu540: Add support for cpu fu540	Pragnesh Patel
2020-04-23	riscv: Make SBI v0.2 the default SBI version	Bin Meng
2020-04-23	riscv: Add Kconfig option for SBI v0.2	Bin Meng