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AgeCommit message (Expand)Author
2023-02-27Merge tag 'v2023.04-rc3' into nextTom Rini
2023-02-17riscv: binman: Add help message for missing blobsRick Chen
2023-02-17riscv: Rename Andes cpu and board namesLeo Yu-Chi Liang
2023-02-17riscv: ae350: dts: Update L2 cache compatible stringYu Chien Peter Lin
2023-02-14dm: dts: Convert driver model tags to use new schemaSimon Glass
2022-11-15riscv: dts: fix the mpfs's reference clock frequencyConor Dooley
2022-11-03riscv: dts: Add QSPI NAND device nodePadmarao Begari
2022-11-03riscv: dts: Update memory configurationPadmarao Begari
2022-11-03riscv: Rename Andes PLIC to PLICSWYu Chien Peter Lin
2022-10-31Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASESimon Glass
2022-09-06riscv: dts: sifive: Synchronize FU740 and Unmatched DTIcenowy Zheng
2022-09-06dt-bindings: clock: sifive: sync FU740 PRCI clock binding headerIcenowy Zheng
2022-09-05riscv: dts: Sync important Unmatched pmic and qspi0 changes from LinuxJessica Clarke
2022-03-15k210: dts: align plic node with LinuxNiklas Cassel
2022-03-15k210: dts: align fpioa node with LinuxDamien Le Moal
2022-03-15k210: dts: add missing power bus clocksDamien Le Moal
2022-03-15k210: use the board vendor name rather than the marketing nameDamien Le Moal
2022-02-09dts: automatically build necessary .dtb filesRasmus Villemoes
2021-12-23riscv: qemu: Split devicetree files for qemu_riscv32/64Simon Glass
2021-12-02riscv: Support booting SiFive Unmatched from SPI.Thomas Skibo
2021-12-02riscv: dts: Split Microchip device treePadmarao Begari
2021-10-18riscv: Remove OF_PRIOR_STAGE from RISC-V boardsIlias Apalodimas
2021-07-21board: sifive: drop stuff related to unmatched revision 1Zong Li
2021-07-07riscv: dts: add OpenPiton RISC-V board dts supportTianrui Wei
2021-07-06riscv: dts: add dts for unmatched rev1Zong Li
2021-07-06riscv: sifive: fu740: Support i2c in splZong Li
2021-07-06board: riscv: add openpiton-riscv64 SoC supportTianrui Wei
2021-06-28Merge tag 'v2021.07-rc5' into nextTom Rini
2021-06-17k210: dts: Set PLL1 to the same rate as PLL0Sean Anderson
2021-06-17riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL configBin Meng
2021-06-17riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bitBin Meng
2021-06-17riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodesBin Meng
2021-06-17riscv: ae350: dts: Remove the unnecessary space in bootargsBin Meng
2021-06-17riscv: ae350: dts: Add SPDX license headerBin Meng
2021-05-31riscv: dts: add SiFive Unmatched board supportGreen Wan
2021-05-31riscv: dts: add fu740 supportGreen Wan
2021-05-19riscv: ae350: Switch to use binman to generate u-boot.itbBin Meng
2021-05-19riscv: qemu: Switch to use binman to generate u-boot.itbBin Meng
2021-05-19riscv: dts: Sort build targets in alphabetical orderBin Meng
2021-05-19riscv: sifive: unleashed: Switch to use binman to generate u-boot.itbBin Meng
2021-05-14riscv: Don't reserve AI ram in k210 dtsSean Anderson
2021-05-14riscv: k210: Use AI as the parent clock of aisram, not PLL1Sean Anderson
2021-05-14riscv: k210: Rename airam to aisramSean Anderson
2021-05-14riscv: Enable some devices pre-relocationSean Anderson
2021-04-08riscv: dts: mpfs-icicle-kit: Drop 'clock-frequency' in the uart nodesBin Meng
2021-04-08riscv: sifive: Rename fu540 board to unleashedBin Meng
2021-04-08riscv: Add watchdog bindings for the k210Sean Anderson
2021-02-25riscv: k210: Enable QSPI for spi3Sean Anderson
2021-01-18riscv: dts: Add device tree for Microchip Icicle KitPadmarao Begari
2020-12-18riscv: Add device tree bindings for SPISean Anderson