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AgeCommit message (Expand)Author
2020-04-23riscv: Move all fdt fixups togetherAtish Patra
2020-04-23riscv: Copy the reserved-memory nodes to final DTAtish Patra
2020-04-23riscv: Setup reserved-memory node for FU540Atish Patra
2020-04-23riscv: Provide a mechanism to fix DT for reserved memoryAtish Patra
2020-04-23riscv: Add boot hartid to device treeAtish Patra
2020-04-23riscv: Introduce SPL_SMP Kconfig option for U-Boot SPLBin Meng
2020-03-17riscv: Implement new SBI v0.2 extensionsBin Meng
2020-03-17riscv: Introduce a new config for SBI v0.1Bin Meng
2020-03-17riscv: Add basic support for SBI v0.2Bin Meng
2020-03-17riscv: Avoid calling sbi_clear_ipi()Bin Meng
2020-02-11Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dmTom Rini
2020-02-10riscv: Add option to print registers on exceptionSean Anderson
2020-02-05dm: core: Require users of devres to include the headerSimon Glass
2020-01-17common: Move hang() to the same header as panic()Simon Glass
2020-01-17common: Move device-tree setup functions to fdt_support.hSimon Glass
2019-12-10riscv: add option to wait for ack from secondary harts in smp functionsLukas Auer
2019-12-10riscv: add functions for reading the IPI statusLukas Auer
2019-12-10riscv: andes_plic: Fix some wrong configurationsRick Chen
2019-12-02common: Move interrupt functions into a new headerSimon Glass
2019-12-02common: Move ARM cache operations out of common.hSimon Glass
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass
2019-10-18RISC-V: Align boot image header with LinuxAtish Patra
2019-09-03riscv: andes_plic: init plic by scanning each cpu nodeRick Chen
2019-08-26riscv: add a generic FIT generator scriptLukas Auer
2019-08-26riscv: add SPL supportLukas Auer
2019-08-26riscv: add run mode configuration for SPLLukas Auer
2019-07-16efi_loader: use predefined constants in crt0_*_efi.SHeinrich Schuchardt
2019-05-09RISCV: image: Add booti supportAtish Patra
2019-05-09riscv: Introduce CONFIG_XIP to support booting from flashRick Chen
2019-04-08riscv: Add a SYSCON driver for Andestech's PLMTRick Chen
2019-04-08riscv: Add a SYSCON driver for Andestech's PLICRick Chen
2019-04-08riscv: boot images passed to bootm on all hartsLukas Auer
2019-04-08riscv: add support for multi-hart systemsLukas Auer
2019-04-08riscv: implement IPI platform functions using SBILukas Auer
2019-04-08riscv: add infrastructure for calling functions on other hartsLukas Auer
2019-01-15riscv: use invalidate/flush_*cache_range functions in cache.cLukas Auer
2019-01-15riscv: move the AX25-specific implementation of flush_dcache_allLukas Auer
2019-01-15riscv: clarify error message on undefined exceptionsLukas Auer
2018-12-31riscv: bootm: Support booting VxWorksBin Meng
2018-12-18riscv: bootm: Change to use boot_hart from global dataBin Meng
2018-12-18riscv: Save boot hart id to the global dataBin Meng
2018-12-18riscv: Adjust the _exit_trap() position to come before handle_trap()Bin Meng
2018-12-18riscv: Implement riscv_get_time() API using rdtime instructionAnup Patel
2018-12-18riscv: Add a SYSCON driver for SiFive's Core Local InterruptorBin Meng
2018-12-05riscv: Add kconfig option to run U-Boot in S-modeAnup Patel
2018-12-02riscv: efi: Generate Microsoft PE format compliant imagesBin Meng
2018-11-26riscv: cache: Implement i/dcache [status, enable, disable]Rick Chen
2018-11-26riscv: align bootm implementation with that of other architecturesLukas Auer
2018-11-26riscv: implement the invalidate_icache_* functionsLukas Auer
2018-11-26riscv: hang on unhandled exceptionsLukas Auer