aboutsummaryrefslogtreecommitdiff
path: root/arch/riscv
AgeCommit message (Expand)Author
2019-12-10riscv: add option to wait for ack from secondary harts in smp functionsLukas Auer
2019-12-10riscv: add functions for reading the IPI statusLukas Auer
2019-12-10riscv: dts: Add #address-cells and #size-cells in nor nodeRick Chen
2019-12-10riscv: dts: Support four cores SMPRick Chen
2019-12-10riscv: Fix clear bss loop in the start-up codeRick Chen
2019-12-10riscv: ax25: cache: Add SPL_RISCV_MMODE for SPLRick Chen
2019-12-10riscv: andes_plic: Fix some wrong configurationsRick Chen
2019-12-10riscv: ax25: add SPL supportRick Chen
2019-12-10riscv: dts: Add hifive-unleashed-a00 dts from LinuxJagan Teki
2019-12-10riscv: increase stack size to avoid a stack overflow during distro bootLukas Auer
2019-12-02common: Move board_get_usable_ram_top() out of common.hSimon Glass
2019-12-02common: Move enable/disable_interrupts out of common.hSimon Glass
2019-12-02common: Move interrupt functions into a new headerSimon Glass
2019-12-02common: Move ARM cache operations out of common.hSimon Glass
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass
2019-10-18RISC-V: Align boot image header with LinuxAtish Patra
2019-10-18gpio: sifive: add support for DM based gpio driver for FU540-SoCSagar Shrikant Kadam
2019-09-03riscv: cache: use CCTL to flush d-cacheRick Chen
2019-09-03riscv: dts: move out AE350 L2 node from cpus nodeRick Chen
2019-09-03riscv: cache: Flush L2 cache before jump to linuxRick Chen
2019-09-03riscv: ax25: add imply v5l2 cache controllerRick Chen
2019-09-03riscv: andes_plic: init plic by scanning each cpu nodeRick Chen
2019-09-03riscv: update fix_rela_dynMarcus Comstedt
2019-08-26riscv: add a generic FIT generator scriptLukas Auer
2019-08-26riscv: support SPL stack and global data relocationLukas Auer
2019-08-26riscv: add SPL supportLukas Auer
2019-08-26riscv: add run mode configuration for SPLLukas Auer
2019-08-15riscv: Access CSRs using CSR numbersBin Meng
2019-08-15riscv: Sync csr.h with Linux kernel v5.2Bin Meng
2019-08-11env: Drop environment.h header file where not neededSimon Glass
2019-07-16efi_loader: use predefined constants in crt0_*_efi.SHeinrich Schuchardt
2019-06-05riscv: Add Microchip MPFS Icicle board supportPadmarao Begari
2019-05-18CONFIG_SPL_SYS_[DI]CACHE_OFF: addTrevor Woerner
2019-05-18CONFIG_SYS_[DI]CACHE_OFF: convert to KconfigTrevor Woerner
2019-05-09RISCV: image: Add booti supportAtish Patra
2019-05-09riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is ena...Rick Chen
2019-05-09riscv: Introduce CONFIG_XIP to support booting from flashRick Chen
2019-04-12dts: switch spi-flash to jedec, spi-nor compatibleNeil Armstrong
2019-04-08riscv: dts: fix CONFIG_DEFAULT_DEVICE_TREE failureRick Chen
2019-04-08riscv: dts: ae350 support SMPRick Chen
2019-04-08riscv: ax25: Andes specific cache shall only support in M-modeRick Chen
2019-04-08riscv: ax25: Add platform-specific Kconfig optionsRick Chen
2019-04-08riscv: Add a SYSCON driver for Andestech's PLMTRick Chen
2019-04-08riscv: Add a SYSCON driver for Andestech's PLICRick Chen
2019-04-08riscv: hang if relocation of secondary harts failsLukas Auer
2019-04-08riscv: do not rely on hart ID passed by previous boot stageLukas Auer
2019-04-08riscv: boot images passed to bootm on all hartsLukas Auer
2019-04-08riscv: add support for multi-hart systemsLukas Auer
2019-04-08riscv: save hart ID in register tp instead of s0Lukas Auer
2019-04-08riscv: delay initialization of caches and debug UARTLukas Auer