aboutsummaryrefslogtreecommitdiff
path: root/arch/riscv
AgeCommit message (Expand)Author
2019-02-27riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrdAnup Patel
2019-02-27riscv: Add SiFive FU540 board supportAnup Patel
2019-02-27riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systemsAnup Patel
2019-02-27riscv: Add place-holder asm/arch/clk.h for driver compilationAnup Patel
2019-02-27riscv: Add asm/dma-mapping.h for DMA mappingsAnup Patel
2019-02-27riscv: Rename cpu/qemu to cpu/genericAnup Patel
2019-01-15riscv: qemu: define standalone load addressLukas Auer
2019-01-15riscv: remove RISC-V standalone linker scriptLukas Auer
2019-01-15riscv: use invalidate/flush_*cache_range functions in cache.cLukas Auer
2019-01-15riscv: move the AX25-specific implementation of flush_dcache_allLukas Auer
2019-01-15riscv: clarify error message on undefined exceptionsLukas Auer
2018-12-31riscv: bootm: Support booting VxWorksBin Meng
2018-12-18riscv: Remove ae350.dtsBin Meng
2018-12-18riscv: bootm: Change to use boot_hart from global dataBin Meng
2018-12-18riscv: Save boot hart id to the global dataBin Meng
2018-12-18riscv: Adjust the _exit_trap() position to come before handle_trap()Bin Meng
2018-12-18riscv: Return to previous privilege level after trap handlingBin Meng
2018-12-18riscv: Fix context restore before returning from trap handlerBin Meng
2018-12-18riscv: Move trap handler codes to mtrap.SBin Meng
2018-12-18riscv: Do some basic architecture level cpu initializationBin Meng
2018-12-18riscv: Add indirect stringification to csr_xxx opsBin Meng
2018-12-18riscv: Update supports_extension() to use desc from cpu driverBin Meng
2018-12-18riscv: Add exception codes for xcause registerBin Meng
2018-12-18riscv: Add CSR numbersBin Meng
2018-12-18riscv: Remove non-DM version of print_cpuinfo()Bin Meng
2018-12-18riscv: Probe cpus during bootBin Meng
2018-12-18riscv: Enlarge the default SYS_MALLOC_F_LENBin Meng
2018-12-18riscv: qemu: Add platform-specific Kconfig optionsBin Meng
2018-12-18riscv: Implement riscv_get_time() API using rdtime instructionAnup Patel
2018-12-18riscv: Add a SYSCON driver for SiFive's Core Local InterruptorBin Meng
2018-12-18riscv: Introduce a Kconfig option for machine modeAnup Patel
2018-12-18riscv: ax25: Hide the ax25-specific Kconfig optionBin Meng
2018-12-18riscv: qemu: Create a simple-bus driver for the soc nodeBin Meng
2018-12-18riscv: add Kconfig entries for the code modelLukas Auer
2018-12-05riscv: ax25-ae350: Pass dtb address to u-boot with a1 registerRick Chen
2018-12-05riscv: Add kconfig option to run U-Boot in S-modeAnup Patel
2018-12-02riscv: efi: Generate Microsoft PE format compliant imagesBin Meng
2018-11-26riscv: cache: Implement i/dcache [status, enable, disable]Rick Chen
2018-11-26riscv: dts: Add ae350_32.dts for RV32IRick Chen
2018-11-26riscv: dts: Sync to Linux Kernel ae350 dts.Rick Chen
2018-11-26riscv: align bootm implementation with that of other architecturesLukas Auer
2018-11-26riscv: save hart ID and device tree passed by prior boot stageLukas Auer
2018-11-26riscv: do not blindly modify the mstatus CSRLukas Auer
2018-11-26riscv: remove unused labels in start.SLukas Auer
2018-11-26Drop CONFIG_INIT_CRITICALBin Meng
2018-11-26riscv: align mtvec on a 4-byte boundaryLukas Auer
2018-11-26riscv: fix inconsistent use of spaces and tabs in start.SLukas Auer
2018-11-26riscv: implement the invalidate_icache_* functionsLukas Auer
2018-11-26riscv: hang on unhandled exceptionsLukas Auer
2018-11-26riscv: treat undefined exception codes as reservedLukas Auer