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2023-09-22x86: doc: coreboot: Mention 64-bit Linux distrosSimon Glass
Add a little more detail as to why coreboot64 is preferred for booting Linux distros. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: coreboot: Drop USB init on startupSimon Glass
This is very annoying as it is quite slow on many machines. Also, U-Boot has an existing 'preboot' mechanism to enable this feature if desired. Drop this code so that it is possible to choose whether to init USB or not. Use the existing USE_PREBOOT mechanism instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: coreboot: Enable standard bootSimon Glass
Enable bootstd options and provide instructions on how to boot a linux distro using coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: coreboot: Add IDE and SATASimon Glass
Add these options to permit access to more disk types. Add some documentation as well. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-08-17CI: x86: coreboot: Update to latest corebootSimon Glass
Use a recent coreboot build for this test. The coreboot commit is: 6f5ead14b4 mb/google/nissa/var/joxer: Update eMMC DLL settings This is build with default settings, i.e. QEMU x86 i440fx/piix4 Add some documentation as to how to update it next time. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-09x86: coreboot: Update doc for CBFS accessSimon Glass
Add an example to show how cbfs is used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [Removed CONFIG_CMD_CBFS from defconfig files] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11x86: coreboot: Document how to enable the debug UARTSimon Glass
This is not obvious so add a little note about how it works. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-10-31Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASESimon Glass
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-15x86: coreboot: Document the memory mapSimon Glass
Add information about memory usage when U-Boot is started from coreboot. This is useful when debugging. Also, since coreboot takes a chunk of memory in the middle of SDRAM for use by PCI devices, it can help avoid overwriting this with a loaded kernel by accident. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-05-04x86: Add a 64-bit 'coreboot64' buildSimon Glass
Coreboot is a first-stage bootloader mostly used on x86 devices as an alternative to UEFI. Coreboot runs in 32-bit mode. U-Boot currently supports booting from coreboot as a second-stage bootloader, also in 32-bit mode. However it is useful to be able to run U-Boot in 64-bit mode. To do this we can have a 32-bit SPL which switches over the CPU and jumps to a 64-bit U-Boot proper. Add a new 'coreboot64' board for running 64-bit U-Boot from coreboot. This uses binman to create an image with a 32-bit SPL and a 64-bit U-Boot. This allows running 64-bit EFI images on x86, for example, without needing a native U-Boot port for a board. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-24doc: board: Add coreboot board docBin Meng
This extracts coreboot board specific information from README.x86, converts plain text documentation to reST format and adds it to Sphinx TOC tree. No essential content change. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>