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path: root/drivers/clk/renesas
AgeCommit message (Expand)Author
2023-02-02clk: renesas: rcar-gen3: Factor out CPG libraryHai Pham
2023-02-02clk: renesas: Add R8A77970 SD0H/SD0 clocks for SDHIHai Pham
2023-02-02clk: renesas: Switch to new SD clock handlingHai Pham
2023-02-02clk: renesas: Handle E3/D3 RPCSRC clockHai Pham
2023-02-02clk: renesas: Introduce and use rcar_clk_get_rate64_div_table functionHai Pham
2023-02-02clk: renesas: Convert Gen2/Gen3 clock tables to clk-provider struct clk_div_t...Marek Vasut
2023-02-02clk: renesas: Drop core param from gen3_clk_get_rate64_pll_mul_regMarek Vasut
2023-02-02clk: renesas: Use pre-defined offset for RPC clocksHai Pham
2023-02-02clk: renesas: Add and enable CPG reset driverMarek Vasut
2023-02-02clk: renesas: r8a7796: Add R8A77961 CPG/MSSR supportHai Pham
2023-02-02clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960Hai Pham
2023-02-02clk: renesas: Synchronize R8A774E1 RZ/G2H clock tables with Linux 6.1.7Marek Vasut
2023-02-02clk: renesas: Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.1.7Marek Vasut
2023-02-02clk: renesas: Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.1.7Marek Vasut
2023-02-02clk: renesas: Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.1.7Marek Vasut
2023-02-02clk: renesas: Synchronize R8A779A0 V3U clock tables with Linux 6.1.7Marek Vasut
2023-02-02clk: renesas: Synchronize R8A77995 D3 clock tables with Linux 6.1.7Marek Vasut
2023-02-02clk: renesas: Synchronize R8A77990 E3 clock tables with Linux 6.1.7Marek Vasut
2023-02-02clk: renesas: Synchronize R8A77980 V3H clock tables with Linux 6.1.7Marek Vasut
2023-02-02clk: renesas: Synchronize R8A77965 M3-N clock tables with Linux 6.1.7Marek Vasut
2023-02-02clk: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ clock tables with ...Marek Vasut
2023-02-02clk: renesas: Synchronize R8A7795 H3 clock tables with Linux 6.1.7Marek Vasut
2023-02-02clk: renesas: Add dummy SDnH clockHai Pham
2022-01-13treewide: invaild -> invalidSean Anderson
2021-06-24clk: renesas: Add R8A779A0 clock tablesHai Pham
2021-06-24clk: renesas: Handle R8A779A0 V3U clock types in Gen3 clock codeMarek Vasut
2021-05-21clk: renesas: Deduplicate gen3_clk_get_rate64() PLL handlingMarek Vasut
2021-05-21clk: renesas: Add register pointers into struct cpg_mssr_infoHai Pham
2021-05-21clk: renesas: Introduce enum clk_reg_layoutHai Pham
2021-05-21clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable()Hai Pham
2021-05-21clk: renesas: Make reset controller modemr register offset configurableMarek Vasut
2021-05-21clk: renesas: Add support for RPCD2 clockHai Pham
2021-05-21clk: renesas: Fix Realtime Module Stop Control Register offsetsHai Pham
2021-05-21clk: renesas: Fix incorrect return RPC clk_get_rateHai Pham
2021-05-21clk: renesas: Reinstate RPC clock on R-Car D3/E3Marek Vasut
2021-05-21clk: renesas: Synchronize R-Car Gen3 tables with Linux 5.12Marek Vasut
2021-05-21clk: renesas: Synchronize R-Car Gen2 tables with Linux 5.12Marek Vasut
2021-05-21clk: renesas: Synchronize RZ/G2 tables with Linux 5.12Marek Vasut
2021-04-25clk: renesas: Synchronize Gen2 MSTP teardown tablesMarek Vasut
2021-04-25clk: renesas: Only ever access documented bits in clock driver teardownMarek Vasut
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass
2020-10-20clk: renesas: Import R8A774C0 clock tables from Linux 5.9Lad Prabhakar
2020-10-20clk: renesas: Add R8A774E1 clock tablesBiju Das
2020-10-20clk: renesas: Add R8A774B1 clock tablesBiju Das
2020-10-20clk: renesas: r8a774a1-cpg-mssr: Add R8A774A1 RPC clockBiju Das
2020-07-27Merge tag 'dm-pull-20jul20-take2a' of https://gitlab.denx.de/u-boot/custodian...Tom Rini
2020-07-25treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()Masahiro Yamada
2020-07-25clk: renesas: Add R8A774A1 clock tablesAdam Ford
2020-07-24Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini