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path: root/drivers/clk
AgeCommit message (Expand)Author
2021-06-17clk: k210: Don't set PLL rates if we are already at the correct rateSean Anderson
2021-06-17clk: k210: Re-add support for setting rateSean Anderson
2021-06-17clk: k210: Implement soc_clk_dumpSean Anderson
2021-06-17clk: k210: Move pll into the rest of the driverSean Anderson
2021-06-17clk: k210: Rewrite to remove CCFSean Anderson
2021-06-17clk: Allow force setting clock defaults before relocationSean Anderson
2021-06-11clk: add support for TI K3 SoC clocksTero Kristo
2021-06-11clk: add support for TI K3 SoC PLLTero Kristo
2021-06-11clk: fix set_rate to clean up cached rates for the hierarchyTero Kristo
2021-06-11clk: fix assigned-clocks to pass with deferring providerTero Kristo
2021-06-11clk: sci-clk: fix return value of set_rateTero Kristo
2021-06-11clk: do not attempt to fetch clock pointer with null deviceTero Kristo
2021-06-11clk: fixed_rate: add API for directly registering fixed rate clocksTero Kristo
2021-06-09clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3Giulio Benetti
2021-06-09clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APBGiulio Benetti
2021-05-31drivers: clk: add fu740 supportGreen Wan
2021-05-24treewide: Convert macro and uses of __section(foo) to __section("foo")Marek BehĂșn
2021-05-21clk: renesas: Deduplicate gen3_clk_get_rate64() PLL handlingMarek Vasut
2021-05-21clk: renesas: Add register pointers into struct cpg_mssr_infoHai Pham
2021-05-21clk: renesas: Introduce enum clk_reg_layoutHai Pham
2021-05-21clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable()Hai Pham
2021-05-21clk: renesas: Make reset controller modemr register offset configurableMarek Vasut
2021-05-21clk: renesas: Add support for RPCD2 clockHai Pham
2021-05-21clk: renesas: Fix Realtime Module Stop Control Register offsetsHai Pham
2021-05-21clk: renesas: Fix incorrect return RPC clk_get_rateHai Pham
2021-05-21clk: renesas: Reinstate RPC clock on R-Car D3/E3Marek Vasut
2021-05-21clk: renesas: Synchronize R-Car Gen3 tables with Linux 5.12Marek Vasut
2021-05-21clk: renesas: Synchronize R-Car Gen2 tables with Linux 5.12Marek Vasut
2021-05-21clk: renesas: Synchronize RZ/G2 tables with Linux 5.12Marek Vasut
2021-05-14clk: Add support for the k210 clock driver pre-relocationSean Anderson
2021-05-14clk: k210: Move the clint clock to under aclkSean Anderson
2021-05-14clk: k210: Remove k210_register_pllSean Anderson
2021-05-14clk: k210: Fix PLL enable always getting takenSean Anderson
2021-05-14clk: k210: Fix PLLs not being enabledSean Anderson
2021-05-14clk: Warn on failure to assign rateSean Anderson
2021-05-12clk: ti: am3-dpll: use custom API for memory accessDario Binacchi
2021-05-12clk: ti: gate: use custom API for memory accessDario Binacchi
2021-05-12clk: ti: change clk_ti_latch() signatureDario Binacchi
2021-05-12clk: ti: add custom API for memory accessDario Binacchi
2021-04-29Merge tag 'xilinx-for-v2021.07-rc2' of https://source.denx.de/u-boot/custodia...Tom Rini
2021-04-25clk: renesas: Synchronize Gen2 MSTP teardown tablesMarek Vasut
2021-04-25clk: renesas: Only ever access documented bits in clock driver teardownMarek Vasut
2021-04-23clk: Fix typo in Zynq Kconfig symbol descriptionMichal Simek
2021-04-19clk: meson-g12a: add PCIe gatesNeil Armstrong
2021-04-16clk: sunxi: h6: Add XHCI clocksSamuel Holland
2021-04-16clk: sunxi: Add a dummy clock driver for the RTCSamuel Holland
2021-04-08clk: mpfs_clk: Enable DM_FLAG_PRE_RELOC flagBin Meng
2021-04-06clk: Return -ENOSYS when system call is not availableSimon Glass
2021-04-06clk: Update drivers to use -EINVALSimon Glass
2021-03-31Merge tag 'xilinx-for-v2021.07' of https://source.denx.de/u-boot/custodians/u...Tom Rini