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2020-05-01net: smc911x: Pull MII registration into separate functionMarek Vasut
Pull the MII interface registration into separate function to avoid the ifdeffery in smc911x_initialize(). Moreover, adjust the fail path such that we use goto labels. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Fix potential memleak() in init fail pathMarek Vasut
Fix memleak in the init fail path, where if allocation or registration of MDIO bus fails, then ethernet interface is not unregistered and the private data are not freed, yet the probe function reports a failure. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Invert the logic in smc911x_miiphy_{read,write}()Marek Vasut
Invert the logic in the aforementioned functions to reduce indent, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Rename smc911x_rx() to smc911x_recv()Marek Vasut
Rename the function to keep the naming scheme consistent, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Replace malloc()+memset() with calloc()Marek Vasut
Replace combination of malloc()+memset() with calloc() as the behavior is exactly the same and the amount of code is reduced. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Remove pkt_data_{push,pull}Marek Vasut
These functions are never used and are likely a pre-DM remnant from times long past, just remove them. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: rtl8139: Fill in SPDX tagMarek Vasut
The rtl8139 driver is derived from Etherboot driver, which is in turn derived from Linux 8139too driver added in Linux 2.2.18pre14. An undocumented change in Linux 2.4.10.2 added a new field to the driver, MODULE_LICENSE("GPL"); . According to current Linux kernel licensing rules, Documentation/process/license-rules.rst, quote: "GPL" Module is licensed under GPL version 2. This does not express any distinction between GPL-2.0-only or GPL-2.0-or-later. The exact license information can only be determined via the license information in the corresponding source files. And since the code does not contain any "future" clause, the tag is therefore GPL-2.0 only. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Move functions aroundMarek Vasut
Just move functions around in preparation for easy DM conversion, rename rtl_bcast_addr() to rtl8139_bcast_addr(), no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Finish cleanupMarek Vasut
Finish the checkpatch cleanup of the driver, fix the remaining issues in probe and init function and in global variables, rename the probe function to rtl8139_init(), no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Factor out hardware resetMarek Vasut
This hardware reset and reset-wait implementation was twice in the driver, factor it out into a separate function. This really should use wait_for_bit() eventually and return -ETIMEDOUT, but thus far, handling of any of this is missing from the driver. This must be added later. Thus far, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Minor cleanup of rtl_disable()Marek Vasut
Rename the function to rtl8139_stop(), clean up checkpatch errors in the stop polling function. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Minor cleanup of rtl_poll()Marek Vasut
Rename the function to rtl8139_recv(), clean up various checkpatch errors, line-over-80 conditions, and malformed comments. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Minor cleanup of rtl_transmit()Marek Vasut
Rename the function to rtl8139_send(), clean up the TX polling, the TX OK condition at the end, overuse of typecasts, and various line-over-80 problems. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Minor cleanup of rtl_reset()Marek Vasut
Rename the function to rtl8139_reset(), clean up the reset polling and various line-over-80 problems. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Minor cleanup of set_rx_mode()Marek Vasut
Rename the function to rtl8139_set_rx_mode(), use unsigned variables where applicable and inline mc_filter[] values. No functional chanage. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Consistently use rtl8139_rx_configMarek Vasut
This string of macros is exactly the same thing as rtl8139_rx_config, so just use rtl8139_rx_config. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Minor cleanup of read_eeprom()Marek Vasut
Rename the function to rtl8139_read_eeprom() to keep the naming consistent, keep the variables sorted in reverse xmas tree. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Rework eeprom_delay() macroMarek Vasut
The macro assumes ee_addr variable to be present when it's being used. Rework the macro into a function instead and pass it an argument specifying the register base address, to make it future proof for DM conversion. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Register macro cleanupMarek Vasut
Clean up the horrible register definitions in the RTL8139 driver. This does create a couple of checkpatch errors, but the driver is full of them anyway, and those will be cleaned up later. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: dwc_eth_qos: Prevent DMA from writing updated RX DMA descriptorMarek Vasut
The DMA may attempt to write a DMA descriptor in the ring while it is being updated. By writing the DMA descriptor buffer address to 0, it is assured the DMA will not use such a buffer and the buffer can be updated without any interference. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01net: dwc_eth_qos: Invalidate RX packet DMA bufferMarek Vasut
This patch prevents an issue where the RX packet might have been accessed by the CPU, which now has cached data from the packet in the caches and possibly various write buffers, and these data may be evicted from the caches into the DRAM while the buffer is also written by the DMA. By invalidating the buffer after the CPU accessed it and before the DMA populates the buffer, it is assured that the buffer will not be corrupted. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01net: dwc_eth_qos: Invalidate RX descriptor before readingMarek Vasut
The current code polls the RX desciptor ring for new packets by reading the RX descriptor status. This works by accident, as the RX descriptors are often in non-cacheable memory. However, the driver does support use of RX descriptors in cacheable memory. This patch adds a missing RX descriptor invalidation, which assures the CPU will read a fresh copy of the RX descriptor instead of a cached one. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01net: dwc_eth_qos: Flush the RX descriptors on initMarek Vasut
Currently the code only flushes the first RX descriptor, not every entry in the RX descriptor ring. Fix this, to make sure the DMA engine can pick the RX descriptors correctly. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01net: dwc_eth_qos: Correctly wrap around TX descriptor tail pointerMarek Vasut
This code programs the next descriptor in the TX descriptor ring into the hardware as the last valid TX descriptor. The problem is that if the currenty descriptor is the last one in the array, the code will not wrap around correctly and use TX descriptor 0 again, but instead will use TX descriptor at address right past the TX descriptor ring, which is the first descriptor in the RX ring. Fix this by adding the necessary wrap-around. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01net: dwc_eth_qos: Fully rewrite RX descriptor field 3Marek Vasut
The RX descriptor field 3 should contain only OWN and BUF1V bits before being used for receiving data by the DMA engine. However, right now, if the descriptor was already used for receiving data and is being cleared, the field 3 is only modified and the aforementioned two bits are ORRed into the field. This could lead to a residual dirty bits being left in the field 3 from previous transfer, and it generally does. Fully set the field 3 instead to clear those residual dirty bits. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01net: dc2114x: Switch DEBUG_SROM{,2} to debug_cond()Marek Vasut
Replace the adhoc debugging ifdeffery with debug_cond() and an internal SROM_DEBUG macro to select the debug level. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: dc2114x: Reorganize driverMarek Vasut
Move the functions in the driver around to better fit future DM conversion, drop function forward declarations. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: dc2114x: Clean up INL/OUTL functionsMarek Vasut
Rename these functions to dc2114x_{inl,outl}(), use u32 values in them instead of plain signed integers as all those values are in fact register values and the driver code does bitwise operations on them. No functional change intended. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: dc2114x: Clean up DE4X5 macrosMarek Vasut
Replace these macros with static functions to permit the compiler to do type checking on the functions. The INL()/OUTL() functions have to be moved in this patch as well, as those DE4X5 macros are using them. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: dc2114x: Clean up remaining driver codeMarek Vasut
Clean up the remaining driver code, macro space alignment, function declaration indent, replace __attribute__((aligned(32))) with plain __aligned(32). No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: dc2114x: Clean up SROM operationsMarek Vasut
Clean up the SROM accessors to bring them up to standards with U-Boot coding style. Sort variable into reverse xmas tree. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: dc2114x: Clean up send_setup_frame()Marek Vasut
Clean up the send_setup_frame() to bring it up to standards with U-Boot coding style, invert the loops where applicable to cut down the level of indent. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: dc2114x: Clean up dc21x4x_halt()Marek Vasut
Clean up the driver halt code to bring it up to standards with U-Boot coding style. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: dc2114x: Clean up dc21x4x_recv()Marek Vasut
Clean up the driver recv code to bring it up to standards with U-Boot coding style. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: dc2114x: Clean up dc21x4x_send()Marek Vasut
Clean up the driver send code to bring it up to standards with U-Boot coding style, invert the loops where applicable to cut down the level of indent. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: dc2114x: Clean up init codeMarek Vasut
Clean up the driver init code to bring it up to standards with U-Boot coding style, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: pcnet: Switch to PCI memory accessMarek Vasut
Replace the PCI IO access with PCI memory access, the card supports both, but the former does not work with QEMU SH4. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: pcnet: Replace mips-specific accessorsMarek Vasut
Replace mips-specific UNCACHED_SDRAM() macro with standard map_physmem(), which permits the driver to work on other systems than mips. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: tulip: Remove CONFIG_TULIP_*Marek Vasut
These macros are not used by any board, remove them to simplify the driver. The EEPROM accessors are still retained however, as those might still be useful. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: pcnet: Remove CONFIG_PCNET_79C97xMarek Vasut
These macros guard one switch-case statement, which grows mips malta by some 20 bytes if debug is enabled, and even less if it is not. To make the code simpler, just support all the NICs and be done with it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01clk: rk3399: Set empty for HCLK_SD assigned-clocksJagan Teki
Due to v5.7-rc1 sync the SD controller nodes in rk3399.dtsi have HCLK_SD assigned-clocks which are usually required for Linux and don't require to handle them in U-Boot. assigned-clocks = <&cru HCLK_SD>; So, mark them as empty in clock otherwise device probe on those SD controllers would fail. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-30Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spiTom Rini
- distro boot support for SPI flash - sifive spi flash driver
2020-04-30spi: sifive: Fix QPP transferJagan Teki
The guessed reason is that the existing logic of filling tx fifo with data, rx fifo with NULL for tx transfer and filling rx fifo with data, tx fifo with NULL for rx transfer is not clear enough to support the Quad Page Program.     SiFive SPI controllers have specific sets of watermark registers and SPI I/O directions bits in order to program SPI controllers clear enough to support all sets of operating modes.     Here is the exact programing sequence that would follow on this patch and tested via SPI-NOR and MMC_SPI.     - set the frame format proto, endian - set the frame format dir, set it for tx and clear it for rx - TX transfer:   fill tx fifo with data.   wait for TX watermark bit to clear. - RX transfer:   fill tx fifo with 0xff.   write nbytes to rx watermark register   wait for rx watermark bit to clear.   read the rx fifo data. So, this patch adopts this program sequence and fixes the existing I/O direction bit. Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
2020-04-30spi: sifive: Fix format register proto fieldJagan Teki
SiFive SPI controller has a proto bit field in frame format register which would be used to configure the SPI I/O protocol lines used on specific transfer.  Right now the driver is configuring this proto using slave->mode, for all types of transctions. This makes the driver unable to function since the proto needs to configure dynamically for each and every transaction separately at runtime. Now, the controller driver supports per transfer via spi-mem exec_opo, so add the fmt_proto flag and fill the per transfer buswidth so that the controller configures the proto bit at runtime. This patch fixes the SPI controller works with SPI NOR flash on quad read with page program. Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
2020-04-30spi: sifive: Add spi-mem exec opJagan Teki
SiFive SPI controller is responsible to handle the slave devices like mmc spi and spi nor flash. The controller is designed such a way that it would handle the slave transactions based on the I/O protocol numbers, example if spi nor slave send quad write opcode it has to send alone with I/O protocol number of 4 and if it try to send data it has to send I/O protocol number along with 4 line data. But the current spi-xfer code from spi-mem is combining the opcode and address in a single transaction, so the SPI controller will be unable to identify the I/O protocol number of opcode vs address. So, add the spi-mem exec_op with spi-xfer of opcode, address and data as a separate transaction. This doesn't remove the .xfer of dm_spi_ops since mmc spi will make use of it. Note: This code might have moved to the spi-mem core area once we have done the dedicated tests on other controllers and have real reason to move. Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
2020-04-30mtd: spi-nor-ids: Add Spansion s25fs512s flash entryKuldeep Singh
Spansion "s25fs512s" flash is incorrectly decoded as "s25fl512s" on various platforms as former is not present. Add the entry. Linux already has both the flashes present. A snippet below: { "s25fl512s", INFO6(0x010220, 0x4d0080, 256 * 1024, 256...}, { "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256...}, Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-30watchdog: kconfig: Enable designware for rk3399Jagan Teki
Enable designware watchdog driver for rk3399 if WDT defined. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-30mtd: spi-nor-ids: Enable 4B_OPCODES for is25wp256Jagan Teki
IS25WP256 flash chips do support 4byte address opcodes, so enable support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Sagar Kadam <sagar.kadam@sifive.com>
2020-04-30mtd: spi-nor: Enable QE bit for ISSI flashJagan Teki
Enable QE bit for ISSI flash chips. QE enablement logic is similar to what Macronix has, so reuse the existing code itself. Cc: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-30spi: sifive: Tidy up dm_spi_slave_platdata variableJagan Teki
Usually variable name slave is used for spi_slave structure and slave_plat for the dm_spi_slave_platdata. Let's follow this meaningful notation by replacing slave with slave_plat for dm_spi_slave_platdata structure. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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