1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/remoteproc/xlnx,zynqmp-r5fss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx R5F processor subsystem
maintainers:
- Ben Levinsky <ben.levinsky@amd.com>
- Tanmay Shah <tanmay.shah@amd.com>
description: |
The Xilinx platforms include a pair of Cortex-R5F processors (RPU) for
real-time processing based on the Cortex-R5F processor core from ARM.
The Cortex-R5F processor implements the Arm v7-R architecture and includes a
floating-point unit that implements the Arm VFPv3 instruction set.
properties:
compatible:
enum:
- xlnx,zynqmp-r5fss
- xlnx,versal-r5fss
- xlnx,versal-net-r52fss
"#address-cells":
const: 2
"#size-cells":
const: 2
ranges:
description: |
Standard ranges definition providing address translations for
local R5F TCM address spaces to bus addresses.
xlnx,cluster-mode:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2]
default: 1
description: |
The RPU MPCore can operate in split mode (Dual-processor performance), Safety
lock-step mode(Both RPU cores execute the same code in lock-step,
clock-for-clock) or Single CPU mode (RPU core 0 is held in reset while
core 1 runs normally). The processor does not support dynamic configuration.
Switching between modes is only permitted immediately after a processor reset.
If set to 1 then lockstep mode and if 0 then split mode.
If set to 2 then single CPU mode. When not defined, default will be lockstep mode.
In summary,
0: split mode
1: lockstep mode (default)
2: single cpu mode
xlnx,tcm-mode:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
description: |
Configure RPU TCM
0: split mode
1: lockstep mode
patternProperties:
"^r(.*)@[0-9a-f]+$":
type: object
description: |
The RPU is located in the Low Power Domain of the Processor Subsystem.
Each processor includes separate L1 instruction and data caches and
tightly coupled memories (TCM). System memory is cacheable, but the TCM
memory space is non-cacheable.
Each RPU contains one 64KB memory and two 32KB memories that
are accessed via the TCM A and B port interfaces, for a total of 128KB
per processor. In lock-step mode, the processor has access to 256KB of
TCM memory.
properties:
compatible:
enum:
- xlnx,zynqmp-r5f
- xlnx,versal-r5f
- xlnx,versal-net-r52f
reg:
minItems: 1
maxItems: 4
reg-names:
minItems: 1
maxItems: 4
power-domains:
minItems: 2
maxItems: 5
mboxes:
minItems: 1
items:
- description: mailbox channel to send data to RPU
- description: mailbox channel to receive data from RPU
mbox-names:
minItems: 1
items:
- const: tx
- const: rx
sram:
$ref: /schemas/types.yaml#/definitions/phandle-array
minItems: 1
maxItems: 8
items:
maxItems: 1
description: |
phandles to one or more reserved on-chip SRAM regions. Other than TCM,
the RPU can execute instructions and access data from the OCM memory,
the main DDR memory, and other system memories.
The regions should be defined as child nodes of the respective SRAM
node, and should be defined as per the generic bindings in
Documentation/devicetree/bindings/sram/sram.yaml
memory-region:
description: |
List of phandles to the reserved memory regions associated with the
remoteproc device. This is variable and describes the memories shared with
the remote processor (e.g. remoteproc firmware and carveouts, rpmsg
vrings, ...). This reserved memory region will be allocated in DDR memory.
minItems: 1
maxItems: 8
items:
- description: region used for RPU firmware image section
- description: vdev buffer
- description: vring0
- description: vring1
additionalItems: true
required:
- compatible
- reg
- reg-names
- power-domains
required:
- compatible
- "#address-cells"
- "#size-cells"
- ranges
allOf:
- if:
properties:
compatible:
contains:
enum:
- xlnx,versal-net-r52fss
then:
properties:
xlnx,tcm-mode: false
patternProperties:
"^r52f@[0-9a-f]+$":
type: object
properties:
reg:
minItems: 1
items:
- description: ATCM internal memory
- description: BTCM internal memory
- description: CTCM internal memory
reg-names:
minItems: 1
items:
- const: atcm0
- const: btcm0
- const: ctcm0
power-domains:
minItems: 2
items:
- description: RPU core power domain
- description: ATCM power domain
- description: BTCM power domain
- description: CTCM power domain
- if:
properties:
compatible:
contains:
enum:
- xlnx,zynqmp-r5fss
- xlnx,versal-r5fss
then:
if:
properties:
xlnx,cluster-mode:
enum: [1, 2]
then:
properties:
xlnx,tcm-mode:
enum: [1]
patternProperties:
"^r5f@[0-9a-f]+$":
type: object
properties:
reg:
minItems: 1
items:
- description: ATCM internal memory
- description: BTCM internal memory
- description: extra ATCM memory in lockstep mode
- description: extra BTCM memory in lockstep mode
reg-names:
minItems: 1
items:
- const: atcm0
- const: btcm0
- const: atcm1
- const: btcm1
power-domains:
minItems: 2
items:
- description: RPU core power domain
- description: ATCM power domain
- description: BTCM power domain
- description: second ATCM power domain
- description: second BTCM power domain
required:
- xlnx,tcm-mode
else:
properties:
xlnx,tcm-mode:
enum: [0]
patternProperties:
"^r5f@[0-9a-f]+$":
type: object
properties:
reg:
minItems: 1
items:
- description: ATCM internal memory
- description: BTCM internal memory
reg-names:
minItems: 1
items:
- const: atcm0
- const: btcm0
power-domains:
minItems: 2
items:
- description: RPU core power domain
- description: ATCM power domain
- description: BTCM power domain
required:
- xlnx,tcm-mode
additionalProperties: false
examples:
- |
#include <dt-bindings/power/xlnx-zynqmp-power.h>
// Split mode configuration
soc {
#address-cells = <2>;
#size-cells = <2>;
remoteproc@ffe00000 {
compatible = "xlnx,zynqmp-r5fss";
xlnx,cluster-mode = <0>;
xlnx,tcm-mode = <0>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
<0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
<0x1 0x0 0x0 0xffe90000 0x0 0x10000>,
<0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>;
r5f@0 {
compatible = "xlnx,zynqmp-r5f";
reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>;
reg-names = "atcm0", "btcm0";
power-domains = <&zynqmp_firmware PD_RPU_0>,
<&zynqmp_firmware PD_R5_0_ATCM>,
<&zynqmp_firmware PD_R5_0_BTCM>;
memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>,
<&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
mbox-names = "tx", "rx";
};
r5f@1 {
compatible = "xlnx,zynqmp-r5f";
reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
reg-names = "atcm0", "btcm0";
power-domains = <&zynqmp_firmware PD_RPU_1>,
<&zynqmp_firmware PD_R5_1_ATCM>,
<&zynqmp_firmware PD_R5_1_BTCM>;
memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>,
<&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
mbox-names = "tx", "rx";
};
};
};
- |
//Lockstep configuration
soc {
#address-cells = <2>;
#size-cells = <2>;
remoteproc@ffe00000 {
compatible = "xlnx,zynqmp-r5fss";
xlnx,cluster-mode = <1>;
xlnx,tcm-mode = <1>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
<0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
<0x0 0x10000 0x0 0xffe10000 0x0 0x10000>,
<0x0 0x30000 0x0 0xffe30000 0x0 0x10000>;
r5f@0 {
compatible = "xlnx,zynqmp-r5f";
reg = <0x0 0x0 0x0 0x10000>,
<0x0 0x20000 0x0 0x10000>,
<0x0 0x10000 0x0 0x10000>,
<0x0 0x30000 0x0 0x10000>;
reg-names = "atcm0", "btcm0", "atcm1", "btcm1";
power-domains = <&zynqmp_firmware PD_RPU_0>,
<&zynqmp_firmware PD_R5_0_ATCM>,
<&zynqmp_firmware PD_R5_0_BTCM>,
<&zynqmp_firmware PD_R5_1_ATCM>,
<&zynqmp_firmware PD_R5_1_BTCM>;
memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>,
<&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
mbox-names = "tx", "rx";
};
r5f@1 {
compatible = "xlnx,zynqmp-r5f";
reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
reg-names = "atcm0", "btcm0";
power-domains = <&zynqmp_firmware PD_RPU_1>,
<&zynqmp_firmware PD_R5_1_ATCM>,
<&zynqmp_firmware PD_R5_1_BTCM>;
memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>,
<&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
mbox-names = "tx", "rx";
};
};
};
...
|
