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// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Device Tree Include file for Freescale Layerscape-1046A family SoC.
*
* Copyright 2016, Freescale Semiconductor
* Copyright 2020 NXP
*
* Mingkai Hu <Mingkai.hu@freescale.com>
*/
/dts-v1/;
/include/ "fsl-ls1046a.dtsi"
/ {
model = "LS1046A RDB Board";
aliases {
spi0 = &qspi;
};
};
&qspi {
status = "okay";
s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
};
s25fs512s1: flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <1>;
};
};
&sata {
status = "okay";
};
&i2c0 {
status = "okay";
};
&i2c3 {
status = "okay";
};
#include "fsl-ls1046-post.dtsi"
&fman0 {
ethernet@e4000 {
phy-handle = <&rgmii_phy1>;
phy-connection-type = "rgmii-id";
status = "okay";
};
ethernet@e6000 {
phy-handle = <&rgmii_phy2>;
phy-connection-type = "rgmii-id";
status = "okay";
};
ethernet@e8000 {
phy-handle = <&sgmii_phy1>;
phy-connection-type = "sgmii";
status = "okay";
};
ethernet@ea000 {
phy-handle = <&sgmii_phy2>;
phy-connection-type = "sgmii";
status = "okay";
};
ethernet@f0000 { /* 10GEC1 */
phy-handle = <&aqr106_phy>;
phy-connection-type = "xgmii";
status = "okay";
};
ethernet@f2000 { /* 10GEC2 */
fixed-link = <0 1 1000 0 0>;
phy-connection-type = "xgmii";
status = "okay";
};
mdio@fc000 {
rgmii_phy1: ethernet-phy@1 {
reg = <0x1>;
};
rgmii_phy2: ethernet-phy@2 {
reg = <0x2>;
};
sgmii_phy1: ethernet-phy@3 {
reg = <0x3>;
};
sgmii_phy2: ethernet-phy@4 {
reg = <0x4>;
};
};
mdio@fd000 {
aqr106_phy: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
interrupts = <0 131 4>;
reg = <0x0>;
};
};
};
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