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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
*/
#include <config.h>
/ {
binman: binman {
multiple-images;
};
};
#ifdef CONFIG_TPL
&binman {
simple-bin {
filename = "u-boot-rockchip.bin";
pad-byte = <0xff>;
mkimage {
filename = "idbloader.img";
args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
#ifdef CONFIG_TPL
multiple-data-files;
u-boot-tpl {
};
#endif
u-boot-spl {
};
};
#if defined(CONFIG_SPL_FIT) && defined(CONFIG_ARM64)
fit: fit {
description = "FIT image for U-Boot with bl31 (TF-A)";
#address-cells = <1>;
fit,fdt-list = "of-list";
filename = "u-boot.itb";
fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
fit,align = <512>;
offset = <CONFIG_SPL_PAD_TO>;
images {
u-boot {
description = "U-Boot (64-bit)";
type = "standalone";
os = "U-Boot";
arch = "arm64";
compression = "none";
load = <CONFIG_TEXT_BASE>;
entry = <CONFIG_TEXT_BASE>;
u-boot-nodtb {
};
};
@atf-SEQ {
fit,operation = "split-elf";
description = "ARM Trusted Firmware";
type = "firmware";
arch = "arm64";
os = "arm-trusted-firmware";
compression = "none";
fit,load;
fit,entry;
fit,data;
atf-bl31 {
};
};
@tee-SEQ {
fit,operation = "split-elf";
description = "TEE";
type = "tee";
arch = "arm64";
os = "tee";
compression = "none";
fit,load;
fit,entry;
fit,data;
tee-os {
optional;
};
};
@fdt-SEQ {
description = "fdt-NAME";
compression = "none";
type = "flat_dt";
};
};
configurations {
default = "@config-DEFAULT-SEQ";
@config-SEQ {
description = "NAME.dtb";
fdt = "fdt-SEQ";
firmware = "u-boot";
fit,loadables;
};
};
};
#else
u-boot-img {
offset = <CONFIG_SPL_PAD_TO>;
};
#endif
};
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
simple-bin-spi {
filename = "u-boot-rockchip-spi.bin";
pad-byte = <0xff>;
mkimage {
filename = "idbloader-spi.img";
args = "-n", CONFIG_SYS_SOC, "-T", "rkspi";
#ifdef CONFIG_TPL
multiple-data-files;
u-boot-tpl {
};
#endif
u-boot-spl {
};
};
#ifdef CONFIG_ARM64
fit {
type = "blob";
filename = "u-boot.itb";
#else
u-boot-img {
#endif
/* Sync with u-boot,spl-payload-offset if present */
offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
};
};
#endif /* CONFIG_ROCKCHIP_SPI_IMAGE */
};
#endif /* CONFIG_SPL */
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