1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
|
/*
* Copyright (C) 2015 Altera Corporation <www.altera.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "socfpga_arria10_socdk_sdmmc_handoff.dtsi"
/ {
model = "Altera SOCFPGA Arria 10";
compatible = "altr,socfpga-arria10", "altr,socfpga";
aliases {
ethernet0 = &gmac0;
serial0 = &uart1;
};
chosen {
bootargs = "earlyprintk";
stdout-path = "serial0:115200n8";
};
memory@0 {
name = "memory";
device_type = "memory";
reg = <0x0 0x40000000>; /* 1GB */
u-boot,dm-pre-reloc;
};
a10leds {
compatible = "gpio-leds";
a10sr_led0 {
label = "a10sr-led0";
gpios = <&a10sr_gpio 0 1>;
};
a10sr_led1 {
label = "a10sr-led1";
gpios = <&a10sr_gpio 1 1>;
};
a10sr_led2 {
label = "a10sr-led2";
gpios = <&a10sr_gpio 2 1>;
};
a10sr_led3 {
label = "a10sr-led3";
gpios = <&a10sr_gpio 3 1>;
};
};
soc {
u-boot,dm-pre-reloc;
};
};
&gmac0 {
phy-mode = "rgmii";
phy-addr = <0xffffffff>; /* probe for phy addr */
/*
* These skews assume the user's FPGA design is adding 600ps of delay
* for TX_CLK on Arria 10.
*
* All skews are offset since hardware skew values for the ksz9031
* range from a negative skew to a positive skew.
* See the micrel-ksz90x1.txt Documentation file for details.
*/
txd0-skew-ps = <0>; /* -420ps */
txd1-skew-ps = <0>; /* -420ps */
txd2-skew-ps = <0>; /* -420ps */
txd3-skew-ps = <0>; /* -420ps */
rxd0-skew-ps = <420>; /* 0ps */
rxd1-skew-ps = <420>; /* 0ps */
rxd2-skew-ps = <420>; /* 0ps */
rxd3-skew-ps = <420>; /* 0ps */
txen-skew-ps = <0>; /* -420ps */
txc-skew-ps = <1860>; /* 960ps */
rxdv-skew-ps = <420>; /* 0ps */
rxc-skew-ps = <1680>; /* 780ps */
max-frame-size = <3800>;
status = "okay";
};
&gpio1 {
status = "okay";
};
&spi1 {
status = "okay";
resource-manager@0 {
compatible = "altr,a10sr";
reg = <0>;
spi-max-frequency = <100000>;
/* low-level active IRQ at GPIO1_5 */
interrupt-parent = <&portb>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <2>;
a10sr_gpio: gpio-controller {
compatible = "altr,a10sr-gpio";
gpio-controller;
#gpio-cells = <2>;
};
a10sr_rst: reset-controller {
compatible = "altr,a10sr-reset";
#reset-cells = <1>;
};
};
};
&i2c1 {
status = "okay";
/*
* adjust the falling times to decrease the i2c frequency to 50Khz
* because the LCD module does not work at the standard 100Khz
*/
clock-frequency = <100000>;
i2c-sda-falling-time-ns = <6000>;
i2c-scl-falling-time-ns = <6000>;
eeprom@51 {
compatible = "atmel,24c32";
reg = <0x51>;
pagesize = <32>;
};
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
ltc@5c {
compatible = "ltc2977";
reg = <0x5c>;
};
};
&uart1 {
clock-frequency = <50000000>;
u-boot,dm-pre-reloc;
status = "okay";
};
&usb0 {
status = "okay";
disable-over-current;
};
&watchdog1 {
status = "okay";
};
|
