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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
*/
#include "socfpga_cyclone5.dtsi"
#include "socfpga-common-u-boot.dtsi"
/ {
model = "SoCFPGA Cyclone V IS1";
compatible = "anonymous,socfpga-is1", "altr,socfpga-cyclone5", "altr,socfpga";
chosen {
bootargs = "console=ttyS0,115200";
stdout-path = "serial0:115200n8";
};
memory {
name = "memory";
device_type = "memory";
reg = <0x0 0x10000000>;
};
aliases {
ethernet0 = &gmac1;
udc0 = &usb1;
};
regulator_3_3v: 3-3-v-regulator {
compatible = "regulator-fixed";
regulator-name = "3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";
rxd0-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd3-skew-ps = <0>;
txen-skew-ps = <0>;
txc-skew-ps = <1560>;
rxdv-skew-ps = <0>;
rxc-skew-ps = <1200>;
};
&gpio1 {
status = "okay";
};
&porta {
bank-name = "porta";
};
&i2c0 {
status = "okay";
eeprom@51 {
compatible = "atmel,24c32";
reg = <0x51>;
pagesize = <32>;
};
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
&mmc0 {
status = "okay";
u-boot,dm-pre-reloc;
cd-gpios = <&portb 18 0>;
vmmc-supply = <®ulator_3_3v>;
vqmmc-supply = <®ulator_3_3v>;
};
&qspi {
status = "okay";
u-boot,dm-pre-reloc;
flash0: n25q00@0 {
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00", "jedec,spi-nor";
reg = <0>; /* chip select */
spi-max-frequency = <100000000>;
m25p,fast-read;
page-size = <256>;
block-size = <16>; /* 2^16, 64KB */
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
};
};
&usb1 {
status = "okay";
};
&uart0 {
u-boot,dm-pre-reloc;
};
&watchdog0 {
status = "disabled";
};
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