aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/dts/vf.dtsi
blob: 5ba13dc62bc3233c53383e075873928d055827b8 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 */
/include/ "skeleton.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		gpio4 = &gpio4;
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		serial4 = &uart4;
		serial5 = &uart5;
		spi0 = &dspi0;
		spi1 = &dspi1;
		ehci0 = &ehci0;
		ehci1 = &ehci1;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2c3 = &i2c3;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		ranges;

		aips0: bus@40000000 {
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x00070000>;
			ranges;

			uart0: serial@40027000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40027000 0x1000>;
				status = "disabled";
			};

			uart1: serial@40028000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40028000 0x1000>;
				status = "disabled";
			};

			uart2: serial@40029000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40029000 0x1000>;
				status = "disabled";
			};

			uart3: serial@4002a000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x4002a000 0x1000>;
				status = "disabled";
			};

			dspi0: dspi0@4002c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x4002c000 0x1000>;
				num-cs = <5>;
				status = "disabled";
			};

			dspi1: dspi1@4002d000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x4002d000 0x1000>;
				num-cs = <5>;
				status = "disabled";
			};

			qspi0: quadspi@40044000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-qspi";
				reg = <0x40044000 0x1000>,
					  <0x20000000 0x10000000>;
				reg-names = "QuadSPI", "QuadSPI-memory";
				status = "disabled";
			};

			i2c0: i2c@40066000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x40066000 0x1000>;
				status = "disabled";
			};

			i2c1: i2c@40067000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x40067000 0x1000>;
				status = "disabled";
			};

			iomuxc: iomuxc@40048000 {
				compatible = "fsl,vf610-iomuxc";
				reg = <0x40048000 0x1000>;
				fsl,mux_mask = <0x700000>;
			};

			gpio0: gpio@40049000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x400ff000 0x40>;
				#gpio-cells = <2>;
			};

			gpio1: gpio@4004a000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x400ff040 0x40>;
				#gpio-cells = <2>;
			};

			gpio2: gpio@4004b000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x400ff080 0x40>;
				#gpio-cells = <2>;
			};

			gpio3: gpio@4004c000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x400ff0c0 0x40>;
				#gpio-cells = <2>;
			};

			gpio4: gpio@4004d000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x400ff100 0x40>;
				#gpio-cells = <2>;
			};

			dcu0: dcu@40058000 {
				compatible = "fsl,vf610-dcu";
				reg = <0x40058000 0x1200>;
				status = "disabled";
			};

			ehci0: ehci@40034000 {
				compatible = "fsl,vf610-usb";
				reg = <0x40034000 0x800>;
				status = "disabled";
			};
		};

		aips1: bus@40080000 {
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40080000 0x0007f000>;
			ranges;

			uart4: serial@400a9000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x400a9000 0x1000>;
				status = "disabled";
			};

			uart5: serial@400aa000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x400aa000 0x1000>;
				status = "disabled";
			};

			ehci1: ehci@400b4000 {
				compatible = "fsl,vf610-usb";
				reg = <0x400b4000 0x800>;
				status = "disabled";
			};

			esdhc1: esdhc@400b2000 {
				compatible = "fsl,esdhc";
				reg = <0x400b2000 0x1000>;
				status = "disabled";
			};

			fec0: fec@400d0000 {
			      compatible = "fsl,mvf600-fec";
			      reg = <0x400d0000 0x1000>;
			      status = "disabled";
			};

			fec1: fec@400d1000 {
			      compatible = "fsl,mvf600-fec";
			      reg = <0x400d1000 0x1000>;
			      status = "disabled";
			};

			nfc: nand@400e0000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-nfc";
				reg = <0x400e0000 0x4000>;
				status = "disabled";
			};

			i2c2: i2c@400e6000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x400e6000 0x1000>;
				status = "disabled";
			};

			i2c3: i2c@400e7000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x400e7000 0x1000>;
				status = "disabled";
			};
		};
	};
};