arch/arm/dts/zynq-zybo.dts


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54

/*
 * Digilent ZYBO board DTS
 *
 *  Copyright (C) 2011 - 2015 Xilinx
 *  Copyright (C) 2012 National Instruments Corp.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
/dts-v1/;
#include "zynq-7000.dtsi"

/ {
	model = "Zynq ZYBO Development Board";
	compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";

	aliases {
		ethernet0 = &gem0;
		serial0 = &uart1;
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x20000000>;
	};

	chosen {
		bootargs = "earlyprintk";
		stdout-path = "serial0:115200n8";
	};

};

&clkc {
	ps-clk-frequency = <50000000>;
};

&gem0 {
	status = "okay";
	phy-mode = "rgmii-id";
	phy-handle = <&ethernet_phy>;

	ethernet_phy: ethernet-phy@0 {
		reg = <0>;
	};
};

&sdhci0 {
	status = "okay";
};

&uart1 {
	u-boot,dm-pre-reloc;
	status = "okay";
};