blob: c7da3520c42a1c0527c20cf0eb44a128201e04f5 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
|
/*
* keystone2: common clock header file
*
* (C) Copyright 2012-2014
* Texas Instruments Incorporated, <www.ti.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARCH_CLOCK_H
#define __ASM_ARCH_CLOCK_H
#ifndef __ASSEMBLY__
#ifdef CONFIG_SOC_K2HK
#include <asm/arch/clock-k2hk.h>
#endif
#define MAIN_PLL CORE_PLL
#include <asm/types.h>
struct keystone_pll_regs {
u32 reg0;
u32 reg1;
};
/* PLL configuration data */
struct pll_init_data {
int pll;
int pll_m; /* PLL Multiplier */
int pll_d; /* PLL divider */
int pll_od; /* PLL output divider */
};
extern const struct keystone_pll_regs keystone_pll_regs[];
void init_plls(int num_pll, struct pll_init_data *config);
void init_pll(const struct pll_init_data *data);
unsigned long clk_get_rate(unsigned int clk);
unsigned long clk_round_rate(unsigned int clk, unsigned long hz);
int clk_set_rate(unsigned int clk, unsigned long hz);
#endif
#endif
|
