aboutsummaryrefslogtreecommitdiff
path: root/arch/mips/dts/nexys4ddr.dts
blob: 6de8584ea796b28ef2ea5fc1858fd6105e1438ba (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
/dts-v1/;

#include "microAptiv.dtsi"

/ {
	compatible = "digilent,nexys4ddr";

	memory {
		device_type = "memory";
		reg = <0x0 0x08000000>;
	};

	cpuintc: interrupt-controller@0 {
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
		compatible = "mti,cpu-interrupt-controller";
	};

	aliases {
		console = &axi_uart16550;
	};

	axi_ethernetlite: ethernet@10e00000 {
		compatible = "xlnx,xps-ethernetlite-1.00.a";
		device_type = "network";
		local-mac-address = [08 86 4C 0D F7 09];
		phy-handle = <&phy0>;
		reg = <0x10e00000 0x10000>;
		xlnx,duplex = <0x1>;
		xlnx,include-global-buffers = <0x1>;
		xlnx,include-internal-loopback = <0x0>;
		xlnx,include-mdio = <0x1>;
		xlnx,instance = "axi_ethernetlite_inst";
		xlnx,rx-ping-pong = <0x1>;
		xlnx,s-axi-id-width = <0x1>;
		xlnx,tx-ping-pong = <0x1>;
		xlnx,use-internal = <0x0>;
		mdio {
			#address-cells = <1>;
			#size-cells = <0>;
			phy0: phy@1 {
				device_type = "ethernet-phy";
				reg = <1>;
			} ;
		} ;
        } ;


	axi_uart16550: serial@10400000 {
		compatible = "ns16550a";
		reg = <0x10400000 0x10000>;

		reg-shift = <2>;
		reg-offset = <0x1000>;

		clock-frequency = <50000000>;

	};
};