1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
|
// SPDX-License-Identifier: BSD-3-Clause
/*
* Reference to the ARM TF Project,
* plat/arm/common/arm_bl2_setup.c
* Portions copyright (c) 2013-2016, ARM Limited and Contributors. All rights
* reserved.
* Copyright (C) 2016 Rockchip Electronic Co.,Ltd
* Written by Kever Yang <kever.yang@rock-chips.com>
* Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
*/
#include <common.h>
#include <atf_common.h>
#include <cpu_func.h>
#include <errno.h>
#include <image.h>
#include <log.h>
#include <spl.h>
#include <asm/cache.h>
/* Holds all the structures we need for bl31 parameter passing */
struct bl2_to_bl31_params_mem {
struct bl31_params bl31_params;
struct atf_image_info bl31_image_info;
struct atf_image_info bl32_image_info;
struct atf_image_info bl33_image_info;
struct entry_point_info bl33_ep_info;
struct entry_point_info bl32_ep_info;
struct entry_point_info bl31_ep_info;
};
struct bl2_to_bl31_params_mem_v2 {
struct bl_params bl_params;
struct bl_params_node bl31_params_node;
struct bl_params_node bl32_params_node;
struct bl_params_node bl33_params_node;
struct atf_image_info bl31_image_info;
struct atf_image_info bl32_image_info;
struct atf_image_info bl33_image_info;
struct entry_point_info bl33_ep_info;
struct entry_point_info bl32_ep_info;
struct entry_point_info bl31_ep_info;
};
struct bl31_params *bl2_plat_get_bl31_params_default(uintptr_t bl32_entry,
uintptr_t bl33_entry,
uintptr_t fdt_addr)
{
static struct bl2_to_bl31_params_mem bl31_params_mem;
struct bl31_params *bl2_to_bl31_params;
struct entry_point_info *bl32_ep_info;
struct entry_point_info *bl33_ep_info;
/*
* Initialise the memory for all the arguments that needs to
* be passed to BL31
*/
memset(&bl31_params_mem, 0, sizeof(struct bl2_to_bl31_params_mem));
/* Assign memory for TF related information */
bl2_to_bl31_params = &bl31_params_mem.bl31_params;
SET_PARAM_HEAD(bl2_to_bl31_params, ATF_PARAM_BL31, ATF_VERSION_1, 0);
/* Fill BL31 related information */
bl2_to_bl31_params->bl31_image_info = &bl31_params_mem.bl31_image_info;
SET_PARAM_HEAD(bl2_to_bl31_params->bl31_image_info,
ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
/* Fill BL32 related information */
bl2_to_bl31_params->bl32_ep_info = &bl31_params_mem.bl32_ep_info;
bl32_ep_info = &bl31_params_mem.bl32_ep_info;
SET_PARAM_HEAD(bl32_ep_info, ATF_PARAM_EP, ATF_VERSION_1,
ATF_EP_SECURE);
/* secure payload is optional, so set pc to 0 if absent */
bl32_ep_info->args.arg3 = fdt_addr;
bl32_ep_info->pc = bl32_entry ? bl32_entry : 0;
bl32_ep_info->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
DISABLE_ALL_EXECPTIONS);
bl2_to_bl31_params->bl32_image_info = &bl31_params_mem.bl32_image_info;
SET_PARAM_HEAD(bl2_to_bl31_params->bl32_image_info,
ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
/* Fill BL33 related information */
bl2_to_bl31_params->bl33_ep_info = &bl31_params_mem.bl33_ep_info;
bl33_ep_info = &bl31_params_mem.bl33_ep_info;
SET_PARAM_HEAD(bl33_ep_info, ATF_PARAM_EP, ATF_VERSION_1,
ATF_EP_NON_SECURE);
/* BL33 expects to receive the primary CPU MPID (through x0) */
bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
bl33_ep_info->pc = bl33_entry;
bl33_ep_info->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
DISABLE_ALL_EXECPTIONS);
bl2_to_bl31_params->bl33_image_info = &bl31_params_mem.bl33_image_info;
SET_PARAM_HEAD(bl2_to_bl31_params->bl33_image_info,
ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
return bl2_to_bl31_params;
}
__weak struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl32_entry,
uintptr_t bl33_entry,
uintptr_t fdt_addr)
{
return bl2_plat_get_bl31_params_default(bl32_entry, bl33_entry,
fdt_addr);
}
struct bl_params *bl2_plat_get_bl31_params_v2_default(uintptr_t bl32_entry,
uintptr_t bl33_entry,
uintptr_t fdt_addr)
{
static struct bl2_to_bl31_params_mem_v2 bl31_params_mem;
struct bl_params *bl_params;
struct bl_params_node *bl_params_node;
/*
* Initialise the memory for all the arguments that needs to
* be passed to BL31
*/
memset(&bl31_params_mem, 0, sizeof(bl31_params_mem));
/* Assign memory for TF related information */
bl_params = &bl31_params_mem.bl_params;
SET_PARAM_HEAD(bl_params, ATF_PARAM_BL_PARAMS, ATF_VERSION_2, 0);
bl_params->head = &bl31_params_mem.bl31_params_node;
/* Fill BL31 related information */
bl_params_node = &bl31_params_mem.bl31_params_node;
bl_params_node->image_id = ATF_BL31_IMAGE_ID;
bl_params_node->image_info = &bl31_params_mem.bl31_image_info;
bl_params_node->ep_info = &bl31_params_mem.bl31_ep_info;
bl_params_node->next_params_info = &bl31_params_mem.bl32_params_node;
SET_PARAM_HEAD(bl_params_node->image_info, ATF_PARAM_IMAGE_BINARY,
ATF_VERSION_2, 0);
/* Fill BL32 related information */
bl_params_node = &bl31_params_mem.bl32_params_node;
bl_params_node->image_id = ATF_BL32_IMAGE_ID;
bl_params_node->image_info = &bl31_params_mem.bl32_image_info;
bl_params_node->ep_info = &bl31_params_mem.bl32_ep_info;
bl_params_node->next_params_info = &bl31_params_mem.bl33_params_node;
SET_PARAM_HEAD(bl_params_node->ep_info, ATF_PARAM_EP,
ATF_VERSION_2, ATF_EP_SECURE);
/* secure payload is optional, so set pc to 0 if absent */
bl_params_node->ep_info->args.arg3 = fdt_addr;
bl_params_node->ep_info->pc = bl32_entry ? bl32_entry : 0;
bl_params_node->ep_info->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
DISABLE_ALL_EXECPTIONS);
SET_PARAM_HEAD(bl_params_node->image_info, ATF_PARAM_IMAGE_BINARY,
ATF_VERSION_2, 0);
/* Fill BL33 related information */
bl_params_node = &bl31_params_mem.bl33_params_node;
bl_params_node->image_id = ATF_BL33_IMAGE_ID;
bl_params_node->image_info = &bl31_params_mem.bl33_image_info;
bl_params_node->ep_info = &bl31_params_mem.bl33_ep_info;
bl_params_node->next_params_info = NULL;
SET_PARAM_HEAD(bl_params_node->ep_info, ATF_PARAM_EP,
ATF_VERSION_2, ATF_EP_NON_SECURE);
/* BL33 expects to receive the primary CPU MPID (through x0) */
bl_params_node->ep_info->args.arg0 = 0xffff & read_mpidr();
bl_params_node->ep_info->pc = bl33_entry;
bl_params_node->ep_info->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
DISABLE_ALL_EXECPTIONS);
SET_PARAM_HEAD(bl_params_node->image_info, ATF_PARAM_IMAGE_BINARY,
ATF_VERSION_2, 0);
return bl_params;
}
__weak struct bl_params *bl2_plat_get_bl31_params_v2(uintptr_t bl32_entry,
uintptr_t bl33_entry,
uintptr_t fdt_addr)
{
return bl2_plat_get_bl31_params_v2_default(bl32_entry, bl33_entry,
fdt_addr);
}
static inline void raw_write_daif(unsigned int daif)
{
__asm__ __volatile__("msr DAIF, %x0\n\t" : : "r" (daif) : "memory");
}
typedef void (*atf_entry_t)(struct bl31_params *params, void *plat_params);
static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl32_entry,
uintptr_t bl33_entry, uintptr_t fdt_addr)
{
atf_entry_t atf_entry = (atf_entry_t)bl31_entry;
void *bl31_params;
if (CONFIG_IS_ENABLED(ATF_LOAD_IMAGE_V2))
bl31_params = bl2_plat_get_bl31_params_v2(bl32_entry,
bl33_entry,
fdt_addr);
else
bl31_params = bl2_plat_get_bl31_params(bl32_entry, bl33_entry,
fdt_addr);
raw_write_daif(SPSR_EXCEPTION_MASK);
dcache_disable();
atf_entry(bl31_params, (void *)fdt_addr);
}
static int spl_fit_images_find(void *blob, int os)
{
int parent, node, ndepth = 0;
const void *data;
if (!blob)
return -FDT_ERR_BADMAGIC;
parent = fdt_path_offset(blob, "/fit-images");
if (parent < 0)
return -FDT_ERR_NOTFOUND;
for (node = fdt_next_node(blob, parent, &ndepth);
(node >= 0) && (ndepth > 0);
node = fdt_next_node(blob, node, &ndepth)) {
if (ndepth != 1)
continue;
data = fdt_getprop(blob, node, FIT_OS_PROP, NULL);
if (!data)
continue;
if (genimg_get_os_id(data) == os)
return node;
};
return -FDT_ERR_NOTFOUND;
}
uintptr_t spl_fit_images_get_entry(void *blob, int node)
{
ulong val;
int ret;
ret = fit_image_get_entry(blob, node, &val);
if (ret)
ret = fit_image_get_load(blob, node, &val);
debug("%s: entry point 0x%lx\n", __func__, val);
return val;
}
void spl_invoke_atf(struct spl_image_info *spl_image)
{
uintptr_t bl32_entry = 0;
uintptr_t bl33_entry = CONFIG_SYS_TEXT_BASE;
void *blob = spl_image->fdt_addr;
uintptr_t platform_param = (uintptr_t)blob;
int node;
/*
* Find the OP-TEE binary (in /fit-images) load address or
* entry point (if different) and pass it as the BL3-2 entry
* point, this is optional.
*/
node = spl_fit_images_find(blob, IH_OS_TEE);
if (node >= 0)
bl32_entry = spl_fit_images_get_entry(blob, node);
/*
* Find the U-Boot binary (in /fit-images) load addreess or
* entry point (if different) and pass it as the BL3-3 entry
* point.
* This will need to be extended to support Falcon mode.
*/
node = spl_fit_images_find(blob, IH_OS_U_BOOT);
if (node >= 0)
bl33_entry = spl_fit_images_get_entry(blob, node);
/*
* If ATF_NO_PLATFORM_PARAM is set, we override the platform
* parameter and always pass 0. This is a workaround for
* older ATF versions that have insufficiently robust (or
* overzealous) argument validation.
*/
if (CONFIG_IS_ENABLED(ATF_NO_PLATFORM_PARAM))
platform_param = 0;
/*
* We don't provide a BL3-2 entry yet, but this will be possible
* using similar logic.
*/
bl31_entry(spl_image->entry_point, bl32_entry,
bl33_entry, platform_param);
}
|