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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/bus/st,stm32mp25-rifsc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: STM32 Resource isolation framework security controller
maintainers:
- Gatien Chevallier <gatien.chevallier@foss.st.com>
description: |
Resource isolation framework (RIF) is a comprehensive set of hardware blocks
designed to enforce and manage isolation of STM32 hardware resources like
memory and peripherals.
The RIFSC (RIF security controller) is composed of three sets of registers,
each managing a specific set of hardware resources:
- RISC registers associated with RISUP logic (resource isolation device unit
for peripherals), assign all non-RIF aware peripherals to zero, one or
any security domains (secure, privilege, compartment).
- RIMC registers: associated with RIMU logic (resource isolation master
unit), assign all non RIF-aware bus master to one security domain by
setting secure, privileged and compartment information on the system bus.
Alternatively, the RISUP logic controlling the device port access to a
peripheral can assign target bus attributes to this peripheral master port
(supported attribute: CID).
- RISC registers associated with RISAL logic (resource isolation device unit
for address space - Lite version), assign address space subregions to one
security domains (secure, privilege, compartment).
select:
properties:
compatible:
contains:
const: st,stm32mp25-rifsc
required:
- compatible
properties:
compatible:
items:
- const: st,stm32mp25-rifsc
- const: simple-bus
reg:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 1
ranges: true
"#access-controller-cells":
const: 1
description:
Contains the firewall ID associated to the peripheral.
patternProperties:
"^.*@[0-9a-f]+$":
description: Peripherals
type: object
additionalProperties: true
required:
- access-controllers
required:
- compatible
- reg
- "#address-cells"
- "#size-cells"
- "#access-controller-cells"
- ranges
additionalProperties: false
examples:
- |
// In this example, the usart2 device refers to rifsc as its domain
// controller.
// Access rights are verified before creating devices.
#include <dt-bindings/interrupt-controller/arm-gic.h>
rifsc: bus@42080000 {
compatible = "st,stm32mp25-rifsc", "simple-bus";
reg = <0x42080000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
#access-controller-cells = <1>;
ranges;
usart2: serial@400e0000 {
compatible = "st,stm32h7-uart";
reg = <0x400e0000 0x400>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ck_flexgen_08>;
access-controllers = <&rifsc 32>;
};
};
|
