aboutsummaryrefslogtreecommitdiff
path: root/dts/upstream/src/arm64/freescale/imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01.dtso
blob: 5058cd9409c755efb3af58ae3637b59fc74d337a (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
 * Copyright (c) 2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
 * D-82229 Seefeld, Germany.
 * Author: Alexander Stein
 */

/dts-v1/;
/plugin/;

#include <dt-bindings/clock/imx8mp-clock.h>

&{/} {
	compatible = "tq,imx8mp-tqma8mpql-mba8mpxl", "tq,imx8mp-tqma8mpql", "fsl,imx8mp";
};

&backlight_lvds {
	status = "okay";
};

&display {
	compatible = "auo,g133han01";
	status = "okay";

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			dual-lvds-odd-pixels;

			panel_in_lvds0: endpoint {
				remote-endpoint = <&ldb_lvds_ch0>;
			};
		};

		port@1 {
			reg = <1>;
			dual-lvds-even-pixels;

			panel_in_lvds1: endpoint {
				remote-endpoint = <&ldb_lvds_ch1>;
			};
		};
	};
};

&lcdif2 {
	status = "okay";
};

&lvds_bridge {
	assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>,
				 <&clk IMX8MP_VIDEO_PLL1>;
	assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
	assigned-clock-rates = <0>, <988400000>;
	status = "okay";

	ports {
		port@1 {
			ldb_lvds_ch0: endpoint {
				remote-endpoint = <&panel_in_lvds0>;
			};
		};

		port@2 {
			ldb_lvds_ch1: endpoint {
				remote-endpoint = <&panel_in_lvds1>;
			};
		};
	};
};

&pwm2 {
	status = "okay";
};